Patent US5767006A successfully refreshed from Google Patents.
US5767006A
Expired / Lapsed
US
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Method for eliminating charge damage during etching of conducting layers
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1996-09-27
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Granted: 1998-06-16
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Expires: 2016-09-27
Abstract
Abstract A plasma etch method for patterning for use within an integrated circuit a blanket conductor layer such that an integrated circuit layer adjoining the blanket conductor layer is not damaged when the blanket conductor layer is patterned to form a patterned conductor layer through the plasma etch method. There is first provided a semiconductor substrate. There is then formed over the semiconductor substrate a blanket conductor layer, where the blanket conductor layer communicates electrically with the semiconductor substrate in a fashion such that an electrical charge is shunted from the blanket conductor layer into the semiconductor substrate when the blanket conductor layer is patterned to form the patterned conductor layer through the plasma etch method. There is then patterned through the plasma etch method the blanket conductor layer to form the patterned conductor layer.
Inventors
- 👤 Jian-Huei Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 21:15
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266; H10P50/267
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
117 words
A method for patterning a conductor layer within an integrated circuit comprising: providing a semiconductor substrate; forming over the semiconductor substrate a blanket conductor layer, the blanket conductor layer communicating electrically with the semiconductor substrate through a patterned conductor interconnect in direct electrical contact physically contacting the semiconductor substrate in a fashion such that an electrical charge formed within the blanket conductor layer upon patterning the blanket conductor layer to form a patterned conductor layer through a plasma etch method is shunted from the blanket conductor layer through the patterned conductor interconnect in direct electrical contact into the semiconductor substrate; and patterning through the plasma etch method the blanket conductor layer to form the patterned conductor layer.
Claim 2
Independent Claim
117 words
A method for patterning a conductor layer within an integrated circuit comprising: providing a semiconductor substrate; forming over the semiconductor substrate a blanket conductor layer, the blanket conductor layer communicating electrically with the semiconductor substrate through a patterned conductor interconnect in direct electrical contact physically contacting the semiconductor substrate in a fashion such that an electrical charge formed within the blanket conductor layer upon patterning the blanket conductor layer to form a patterned conductor layer through a plasma etch method is shunted from the blanket conductor layer through the patterned conductor interconnect in direct electrical contact into the semiconductor substrate; and patterning through the plasma etch method the blanket conductor layer to form the patterned conductor layer.
Claim 3
Dependent Claim
33 words
The method of claim 1 wherein the blanket conductor layer is formed from a conductor material chosen from the group of conductor materials consisting of metals, metal alloys, highly doped polysilicon and polycides.
Claim 4
Dependent Claim
23 words
The method of claim 2 wherein the blanket conductor layer is formed to a thickness of from about 500 to about 7000 angstroms.
Claim 5
Dependent Claim
49 words
The method of claim 1 wherein the plasma etch method is chosen from the group of plasma etch methods consisting of microwave plasma etch methods, reactive ion etch (RIE) plasma etch methods, magnetically enhanced reactive ion etch (MERIE) plasma etch methods and electron cyclotron resonance (ECR) plasma etch methods.
Claim 6
Dependent Claim
25 words
The method of claim 1 wherein the direct electrical contact physically contacting the semiconductor substrate is formed through an ohmic contact to the semiconductor substrate.
Claim 7
Dependent Claim
26 words
The method of claim 1 wherein the direct electrical contact physically contacting the semiconductor substrate is formed through a zener diode contact to the semiconductor substrate.
Claim 8
Dependent Claim
25 words
The method of claim 1 wherein the direct electrical contact physically contacting the semiconductor layer is formed at a kerf region of the semiconductor substrate.
Claim 9
Dependent Claim
38 words
The method of claim 1 further comprising forming an integrated circuit layer over the semiconductor substrate prior to forming the blanket conductor layer over the semiconductor substrate, the blanket conductor layer being formed upon the integrated circuit layer.
Claim 10
Dependent Claim
28 words
The method of claim 8 where the integrated circuit layer is chosen from the group of integrated circuit layers consisting of dielectric layers, semiconductor layers and photoactive layers.
Claim 11
Independent Claim
168 words
A method for avoiding plasma induced damage to a gate dielectric layer when patterning through a plasma etch method a blanket conductor layer electrically communicating with a gate electrode, where the gate electrode is formed upon the gate dielectric layer, comprising: providing a semiconductor substrate; forming upon the semiconductor substrate a gate dielectric layer; forming upon the gate dielectric layer a gate electrode; forming in electrical communication with the gate electrode a blanket conductor layer, the blanket conductor layer also communicating electrically with the semiconductor substrate through a patterned conductor interconnect in direct electrical contact physically contacting the semiconductor substrate in a fashion such that an electrical charge formed within the blanket conductor layer upon patterning the blanket conductor layer to form a patterned conductor layer through a plasma etch method is shunted from the blanket conductor layer through the patterned conductor interconnect in direct electrical contact into the semiconductor substrate; and patterning through the plasma etch method the blanket conductor layer to form a patterned conductor layer.
Claim 12
Independent Claim
168 words
A method for avoiding plasma induced damage to a gate dielectric layer when patterning through a plasma etch method a blanket conductor layer electrically communicating with a gate electrode, where the gate electrode is formed upon the gate dielectric layer, comprising: providing a semiconductor substrate; forming upon the semiconductor substrate a gate dielectric layer; forming upon the gate dielectric layer a gate electrode; forming in electrical communication with the gate electrode a blanket conductor layer, the blanket conductor layer also communicating electrically with the semiconductor substrate through a patterned conductor interconnect in direct electrical contact physically contacting the semiconductor substrate in a fashion such that an electrical charge formed within the blanket conductor layer upon patterning the blanket conductor layer to form a patterned conductor layer through a plasma etch method is shunted from the blanket conductor layer through the patterned conductor interconnect in direct electrical contact into the semiconductor substrate; and patterning through the plasma etch method the blanket conductor layer to form a patterned conductor layer.
Claim 13
Dependent Claim
29 words
The method of claim 10 wherein the blanket conductor layer is formed from a conductor material chosen from the group of conductor materials consisting of metals and metal alloys.
Claim 14
Dependent Claim
23 words
The method of claim 11 wherein the blanket conductor layer is formed to a thickness of from about 3000 to about 7000 angstroms.
Claim 15
Dependent Claim
49 words
The method of claim 10 wherein the plasma etch method is chosen from the group of plasma etch methods consisting of microwave plasma etch methods, reactive ion etch (RIE) plasma etch methods, magnetically enhanced reactive ion etch (MERIE) plasma etch methods and electron cyclotron resonance (ECR) plasma etch methods.
Claim 16
Dependent Claim
25 words
The method of claim 10 wherein the direct electrical contact physically contacting the semiconductor substrate is formed through an ohmic contact to the semiconductor substrate.
Claim 17
Dependent Claim
26 words
The method of claim 10 wherein the direct electrical contact physically contacting the semiconductor substrate is formed through a zener diode contact to the semiconductor substrate.
Claim 18
Dependent Claim
25 words
The method of claim 10 wherein the direct electrical contact physically contacting the semiconductor substrate is formed at a kerf region of the semiconductor substrate.
References Cited (Backward Citations)
US5049514A
Cited
US5393701A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-06-15 | 2001-12-15 | 2002-06-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-06-15 | 2005-12-15 | 2006-06-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-06-15 | 2009-12-15 | 2010-06-16 | $7700.00 | Window Closed / Lapsed |