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US5764884A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for improved instruction counting schemes

Assignee: International Business Machines Corp
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Filing: 1996-10-31
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Granted: 1998-06-09
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Expires: 2016-10-31
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Abstract

Abstract A method and apparatus for monitoring the execution of a procedure having multiple exit points without modifying the software via breakpoints. The starting address of the procedure is loaded into an Instruction Address Break Register (IABR). Upon execution of the starting address the IABR raises an exception. The processing of the exception is used to implement a counting routine and for loading the IABR with the address of the calling party via the Link Register. Upon execution of the address of the calling party, the IABR once again raises an exception. The processing of the second exception is used for stopping the counter and performing any related analysis.

Inventors

  • 👤 James William Van Fleet

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 18:04
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/36; G06F11/3604; G06F11/3612; G06F11/30; G06F11/34; G06F11/3466; G06F11/362; G06F11/3648; G06F2201/00; G06F2201/865; G06F2201/88

Claims Analysis

Total Claims: 24
Claim 1
Independent Claim 133 words
An apparatus, in a computer system, for monitoring the execution of a procedure in a computer program without modifying the program, the procedure having multiple exit points, the apparatus comprising: means for loading the physical address of the procedure into an instruction address breakpoint register; means for loading the address of an instruction subsequent to a branch instruction into a register; means for raising a first exception in response to reaching the address stored in the address breakpoint register; means for loading, in response to the first exception, the instruction address breakpoint register with the address stored in the register; means for raising a second exception in response to reaching the address stored in the address breakpoint register; and means for monitoring the procedure during the time between the first and second exceptions.
Claim 2
Independent Claim 133 words
An apparatus, in a computer system, for monitoring the execution of a procedure in a computer program without modifying the program, the procedure having multiple exit points, the apparatus comprising: means for loading the physical address of the procedure into an instruction address breakpoint register; means for loading the address of an instruction subsequent to a branch instruction into a register; means for raising a first exception in response to reaching the address stored in the address breakpoint register; means for loading, in response to the first exception, the instruction address breakpoint register with the address stored in the register; means for raising a second exception in response to reaching the address stored in the address breakpoint register; and means for monitoring the procedure during the time between the first and second exceptions.
Claim 3
Dependent Claim 17 words
The apparatus of claim 1 further comprising: means for detecting a branch instruction in a calling procedure.
Claim 4
Dependent Claim 39 words
The apparatus of claim 2 wherein the means for loading the address of an instruction, includes: means for loading, in response to detecting the branch instruction, the address of an instruction subsequent to the branch instruction into the register.
Claim 5
Dependent Claim 13 words
The apparatus of claim 3 further comprising: means for executing the branch instruction.
Claim 6
Dependent Claim 19 words
The apparatus of claim 4 further comprising: means for exiting the procedure in response to executing instructions residing therein.
Claim 7
Dependent Claim 45 words
The apparatus of claim 5 wherein the means for monitoring includes: means for initiating, in response to the first exception, a counter; and means for calculating, in response to the second exception, the time for the executing the procedure using the value of the counter.
Claim 8
Dependent Claim 45 words
The apparatus of claim 6 wherein the means for monitoring includes: means for initiating, in response to the first exception, a counter; and means for calculating, in response to the second exception, the time for the executing the procedure using the value of the counter.
Claim 9
Independent Claim 120 words
A method of monitoring the execution of a procedure in a computer program without modifying the program, the procedure having multiple exit points, the method comprising the steps of: loading the physical address of the procedure into an instruction address breakpoint register; loading the address of an instruction subsequent to a branch instruction into a register; raising a first exception in response to reaching the address stored in the address breakpoint register; loading, in response to the first exception, the instruction address breakpoint register with the address stored in the register; raising a second exception in response to reaching the address stored in the address breakpoint register; and monitoring the procedure during the time between the first and second exceptions.
Claim 10
Independent Claim 120 words
A method of monitoring the execution of a procedure in a computer program without modifying the program, the procedure having multiple exit points, the method comprising the steps of: loading the physical address of the procedure into an instruction address breakpoint register; loading the address of an instruction subsequent to a branch instruction into a register; raising a first exception in response to reaching the address stored in the address breakpoint register; loading, in response to the first exception, the instruction address breakpoint register with the address stored in the register; raising a second exception in response to reaching the address stored in the address breakpoint register; and monitoring the procedure during the time between the first and second exceptions.
Claim 11
Dependent Claim 18 words
The method of claim 8 further comprising the step of: detecting a branch instruction in a calling procedure.
Claim 12
Dependent Claim 40 words
The method of claim 9 wherein the step of loading the address of an instruction, includes the step of: loading, in response to detecting the branch instruction, the address of an instruction subsequent to the branch instruction into the register.
Claim 13
Dependent Claim 14 words
The method of claim 10 further comprising the step of: executing the branch instruction.
Claim 14
Dependent Claim 20 words
The method of claim 11 further comprising the step of: exiting the procedure in response to executing instructions residing therein.
Claim 15
Dependent Claim 44 words
The method of claim 12 wherein the step of monitoring includes the steps of: initiating, in response to the first exception, a counter; and calculating, in response to the second exception, the time for the executing the procedure using the value of the counter.
Claim 16
Dependent Claim 44 words
The method of claim 8 wherein the step of monitoring includes the steps of: initiating, in response to the first exception, a counter; and calculating, in response to the second exception, the time for the executing the procedure using the value of the counter.
Claim 17
Dependent Claim 158 words
A computer program product for use with a data processing system, the computer program product comprising: a computer usable medium having computer readable program code means embodied therein for monitoring the execution of a procedure in a computer program without modifying the program, the procedure having multiple exit points, the computer readable program code comprising: means for loading the physical address of the procedure into an instruction address breakpoint register; means for loading the address of an instruction subsequent to a branch instruction into a register; means for raising a first exception in response to reaching the address stored in the address breakpoint register; means for loading, in response to the first exception, the instruction address breakpoint register with the address stored in the register; means for raising a second exception in response to reaching the address stored in the address breakpoint register; and means for monitoring the procedure during the time between the first and second exceptions.
Claim 18
Dependent Claim 158 words
A computer program product for use with a data processing system, the computer program product comprising: a computer usable medium having computer readable program code means embodied therein for monitoring the execution of a procedure in a computer program without modifying the program, the procedure having multiple exit points, the computer readable program code comprising: means for loading the physical address of the procedure into an instruction address breakpoint register; means for loading the address of an instruction subsequent to a branch instruction into a register; means for raising a first exception in response to reaching the address stored in the address breakpoint register; means for loading, in response to the first exception, the instruction address breakpoint register with the address stored in the register; means for raising a second exception in response to reaching the address stored in the address breakpoint register; and means for monitoring the procedure during the time between the first and second exceptions.
Claim 19
Dependent Claim 26 words
The computer program product of claim 15 wherein the computer readable program code means further comprises: means for detecting a branch instruction in a calling procedure.
Claim 20
Dependent Claim 41 words
The computer program product of claim 16 wherein the means for loading the address of an instruction, includes: means for loading, in response to detecting the branch instruction, the address of an instruction subsequent to the branch instruction into the register.
Claim 21
Dependent Claim 22 words
The computer program product of claim 17 wherein the computer readable program code means further comprises: means for executing the branch instruction.
Claim 22
Dependent Claim 28 words
The computer program product of claim 18 wherein the computer readable program code means further comprises: means for exiting the procedure in response to executing instructions residing therein.
Claim 23
Dependent Claim 47 words
The computer program product of claim 19 wherein the means for monitoring includes: means for initiating, in response to the first exception, a counter; and means for calculating, in response to the second exception, the time for the executing the procedure using the value of the counter.
Claim 24
Dependent Claim 47 words
The computer program product of claim 15 wherein the means for monitoring includes: means for initiating, in response to the first exception, a counter; and means for calculating, in response to the second exception, the time for the executing the procedure using the value of the counter.

References Cited (Backward Citations)

US4218741A Cited
US4484271A Cited
US4616331A Cited
US4734849A Cited
US4445170A Cited
US4541056A Cited
US5428749A Cited
US5455936A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-06-08 2001-12-08 2002-06-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-06-08 2005-12-08 2006-06-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-06-08 2009-12-08 2010-06-09 $7700.00 Window Closed / Lapsed

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