Patent US5754442A successfully refreshed from Google Patents.
US5754442A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Path analyzing displaying apparatus for designing logic circuit
Assignee: Fujitsu Ltd
•
Filing: 1995-07-24
•
Granted: 1998-05-19
•
Expires: 2015-07-24
Abstract
Abstract The invention provides a path analyzing displaying apparatus for designing a logic circuit which can achieve reduction in intervention degree of a designer and expansion of human interface with a minimum portion which requires intervention. The apparatus comprises a graphic screen for displaying information necessary for path analysis of a logic circuit of an object of designing. Logic circuit components are grouped into a target group including a noticed point determined based on a logical simulation output result and any of the logic circuit components which can have an influence on the noticed point and a non-target group which includes those logic circuit components which do not have an influence on the analysis point, and the graphic screen displays the logic circuit components separately in the target group and the non-target group. The apparatus is applied to design a logic circuit of an LSI, a PCB or the like.
Inventors
- 👤 Eiji Minagawa
- 👤 Hisashi Uraguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 15:13
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/32; G06F30/33
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
109 words
A path analyzing displaying apparatus for designing a logic circuit, comprising: a display; and means for grouping components of the logic circuit into a target group and a non-target group based on a designated analysis point in the logic circuit, the target group including the designated analysis point and any components which is identified as having an influence on a result output at the analysis point, the non-target group including those components which have not been identified as having an influence on the result output at the analysis point and causing said display to display the components in the target group separate from the components in the non-target group.
Claim 2
Dependent Claim
109 words
A path analyzing displaying apparatus for designing a logic circuit, comprising: a display; and means for grouping components of the logic circuit into a target group and a non-target group based on a designated analysis point in the logic circuit, the target group including the designated analysis point and any components which is identified as having an influence on a result output at the analysis point, the non-target group including those components which have not been identified as having an influence on the result output at the analysis point and causing said display to display the components in the target group separate from the components in the non-target group.
Claim 3
Dependent Claim
24 words
The path analyzing displaying apparatus as claimed in claim 1, further comprising means for erasing the display of the non-target group from said display.
Claim 4
Dependent Claim
36 words
The path analyzing displaying apparatus as claimed in claim 1, wherein said grouping means causes said display to display only those components which correspond to an analysis noticed element designated in advance as the target group.
Claim 5
Dependent Claim
31 words
The path analyzing displaying apparatus as claimed in claim 3, further comprising means for causing said display to display information necessary to designate the analysis noticed element as a guide menu.
Claim 6
Dependent Claim
47 words
The path analyzing displaying apparatus as claimed in claim 3, wherein said grouping means causes said display to display each of the components in the form of a dot and causes said display to display each connection relationship between the components in the form of a branch.
Claim 7
Dependent Claim
33 words
The path analyzing displaying apparatus as claimed in claim 5, wherein said grouping means causes said display to display, in connection with each dot, information which specifies the component indicated by the dot.
Claim 8
Dependent Claim
39 words
The path analyzing displaying apparatus as claimed in claim 5, wherein said grouping means causes said display to display, in connection with each dot, delay times from the analysis point to each logic circuit component indicated by the dot.
Claim 9
Dependent Claim
93 words
The path analyzing displaying apparatus as claimed in claim 3, wherein said grouping means further groups the target group into a nucleus group including the analysis point and those components which directly have an influence on the analysis point and a plurality of associated groups each including those components which have an influence on the nucleus group and causes said display to display the nucleus group and the associated group, said grouping means further causing said display section to display a connection relationship between the nucleus group and the plurality of associated groups.
Claim 10
Dependent Claim
86 words
The path analyzing displaying apparatus as claimed in claim 8, wherein said grouping means groups, where the target group includes a plurality of components which exhibit a hierarchic structure, the plurality of components exhibiting the hierarchic structure into an upper hierarchy group to which those components of an upper hierarchy belong and a lower hierarchy group to which those components of a lower hierarchy belong, and causes said display section to display the upper hierarchy group and the lower hierarchy group in an hierarchically connected condition.
Claim 11
Dependent Claim
51 words
The path analyzing displaying apparatus as claimed in claim 8, wherein said grouping means includes an automatic grouping processing section for automatically performing grouping of the target group displayed on said display by back tracing the components from the analysis point in accordance with the analysis noticed element designated in advance.
Claim 12
Dependent Claim
27 words
The path analyzing displaying apparatus as claimed in claim 8, further comprising an instruction inputting section for inputting an instruction regarding a displaying condition of said display.
Claim 13
Dependent Claim
35 words
The path analyzing displaying apparatus as claimed in claim 11, further comprising means for causing said display to display contents of an instruction inputted by way of said instruction inputting section as a guide menu.
Claim 14
Dependent Claim
47 words
The path analyzing displaying apparatus as claimed in claim 11, further comprising a division processing section for grouping the target group displayed on said display in response to an instruction from said instruction inputting section and causing said display to divisionally display groups obtained by the grouping.
Claim 15
Dependent Claim
62 words
The path analyzing displaying apparatus as claimed in claim 11, further comprising an expansion processing section operable in response to an instruction from said instruction inputting section for causing said display to display a predetermined component as an analysis noticed element in addition to the target group on said display so that the predetermined component may be included into the target group.
Claim 16
Dependent Claim
54 words
The path analyzing displaying apparatus as claimed in claim 11, further comprising a deletion processing section operable in response to an instruction from said instruction inputting section for erasing a display of a predetermined component from the target group on said display so that the predetermined component may be included into the non-target group.
Claim 17
Dependent Claim
54 words
The path analyzing displaying apparatus as claimed in claim 11, further comprising a group unifying processing section operable in response to an instruction from said instruction inputting section for unifying a plurality of groups forming the target group on said display into a single group and causing said display to display the unified group.
References Cited (Backward Citations)
US4263651A
Cited
US4970664A
Cited
US5555201A
Cited
US5463563A
Cited
US5452228A
Cited
JPH05225286A
Cited
JPH05225280A
Cited
US5508937A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-05-18 | 2001-11-17 | 2002-05-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-05-18 | 2005-11-17 | 2006-05-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-05-18 | 2009-11-17 | 2010-05-19 | $7700.00 | Window Closed / Lapsed |