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US5750430A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for making metal oxide semiconductor field effect transistor (MOSFET)

Assignee: SK Hynix Inc
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Filing: 1996-08-23
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Granted: 1998-05-12
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Expires: 2016-08-23
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Abstract

Abstract A metal oxide semiconductor field effect transistor includes source and drain regions formed between a gate. The gate comprises a first conductive layer and a second conductive layer formed on the first conductive layer, and the second conductive layer has curved sidewalls with an insulating layer formed adjacent to the sidewalls. The method of making such a transistor improves the fabrication process, since the deposition thickness is controlled rather than the amount of etching. The transistor has a shortened channel width with reduced overlap capacitance, and the LDD doping compensation phenomenon is removed.

Inventors

  • 👤 Jeong-Hwan Son

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 19:09
CPC Classifications
H; H10; H10D; H10D12/00; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0225; H10D30/0217; H10D30/0218; H10D30/022; H10D30/60; H10D30/601; H10D30/605; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/299; H10D62/307; H10D64/00; H10D64/01; H10D64/018; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 191 words
A fabrication method of making a field effect transistor, comprising the steps of: forming a disposable film on a substrate having an opening to expose a portion of a surface of said substrate therethrough; forming a gate insulation film on the exposed surface of the substrate; forming a first conductive film on said disposable film and said gate insulation film; forming side wall spacers on side walls of the first conductive film on each side surface portion of the first conductive film; forming a second conductive film on the first conductive film so as to fill a space between the side wall spacers entirely, and then etching-back said second conductive film; removing the side wall spacers and forming a low density ion-implantation region in the substrate by ion-implanting impurities through the exposed surface of the first conductive film from which the side wall spacers were removed; forming an insulation film having approximately the same height as the disposable film on the first and second conductive films; removing the disposable film; and forming source-drain regions in the substrate by ion-implanting impurities through the substrate surface from which the disposable film was removed.
Claim 2
Dependent Claim 191 words
A fabrication method of making a field effect transistor, comprising the steps of: forming a disposable film on a substrate having an opening to expose a portion of a surface of said substrate therethrough; forming a gate insulation film on the exposed surface of the substrate; forming a first conductive film on said disposable film and said gate insulation film; forming side wall spacers on side walls of the first conductive film on each side surface portion of the first conductive film; forming a second conductive film on the first conductive film so as to fill a space between the side wall spacers entirely, and then etching-back said second conductive film; removing the side wall spacers and forming a low density ion-implantation region in the substrate by ion-implanting impurities through the exposed surface of the first conductive film from which the side wall spacers were removed; forming an insulation film having approximately the same height as the disposable film on the first and second conductive films; removing the disposable film; and forming source-drain regions in the substrate by ion-implanting impurities through the substrate surface from which the disposable film was removed.
Claim 3
Dependent Claim 22 words
The method of claim 1, wherein the side wall spacers are formed of one of an oxide film and a nitride film.
Claim 4
Dependent Claim 22 words
The method of claim 1, wherein the side wall spacers are removed using one of a wet etching and a dry etching.
Claim 5
Dependent Claim 21 words
The method of claim 1, wherein the disposable film is formed of one of a nitride film and an oxide film.
Claim 6
Dependent Claim 50 words
The method of claim 1, further comprising, after removing said disposable film from the substrate, forming a thermal oxide film on the substrate surface from which said disposable film was removed, and at the same time oxidizing each side wall of the first conductive film connected to said disposable film.
Claim 7
Dependent Claim 52 words
The method of claim 1, further comprising, after forming the side wall spacers on each side wall of the first conductive film, forming a punch-through stop ion-implanted region and a channel region in the substrate by ion-implanting impurities through the exposed first conductive film using the side wall spacers as a mask.
Claim 8
Dependent Claim 27 words
The method of claim 1, wherein said insulation film is etched-back after depositing the insulation film on the disposable film and the first and second conductive films.
Claim 9
Independent Claim 128 words
A method of making a semiconductor device, comprising the steps of: forming a first insulative film on a substrate; removing a portion of said first insulative film to expose an area of said substrate; forming a gate insulation layer over the exposed area of said substrate in the portion; forming a first conductive film over said first insulative film including sidewalls and said gate insulation layer; forming side wall spacers adjacent the first conductive film over the sidewalls in the portion; forming a channel region in said substrate; forming a second conductive film to fill a space between the side wall spacers; removing said side wall spacers to expose the first conductive layer; and implanting impurities to form lightly doped drain regions through the exposed first conductive layer.
Claim 10
Independent Claim 128 words
A method of making a semiconductor device, comprising the steps of: forming a first insulative film on a substrate; removing a portion of said first insulative film to expose an area of said substrate; forming a gate insulation layer over the exposed area of said substrate in the portion; forming a first conductive film over said first insulative film including sidewalls and said gate insulation layer; forming side wall spacers adjacent the first conductive film over the sidewalls in the portion; forming a channel region in said substrate; forming a second conductive film to fill a space between the side wall spacers; removing said side wall spacers to expose the first conductive layer; and implanting impurities to form lightly doped drain regions through the exposed first conductive layer.
Claim 11
Dependent Claim 59 words
The method of claim 8, further comprising the steps of: forming a second insulative film on said first conductive film from which the side wall spacers were removed and the second conductive film in the portion; removing said first insulative film adjacent the portion; and forming source and drain regions in the substrate adjacent to the gate insulation layer.
Claim 12
Dependent Claim 42 words
The method of claim 8, wherein the step of forming the channel region comprises step of ion-implantation of impurities using said side wall spacers as a mask, whereby a punch-through stop region is also formed beneath the channel region in said substrate.
Claim 13
Dependent Claim 28 words
The method of claim 8, wherein the step of implanting impurities to form lightly doped drain regions uses ion implantation with said second conductive film as a mask.
Claim 14
Dependent Claim 53 words
The method of claim 9, wherein said step of forming said source and drain regions comprises the steps of: forming a thermal oxide film on the surface of the substrate where said first insulative film was removed; and ion implantation of impurities through the thermal oxide film using said gate as a mask.

References Cited (Backward Citations)

US4359816A Cited
US4994404A Cited
US5175119A Cited
US5120668A Cited
US5429956A Cited
US5489543A Cited
US5538913A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-05-11 2001-11-10 2002-05-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-05-11 2005-11-10 2006-05-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-05-11 2009-11-10 2010-05-12 $7700.00 Window Closed / Lapsed

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