Patent US5745990A successfully refreshed from Google Patents.
US5745990A
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Titanium boride and titanium silicide contact barrier formation for integrated circuits
Assignee: NXP BV
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Filing: 1995-06-06
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Granted: 1998-05-05
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Expires: 2015-06-06
Abstract
Abstract Titanium is deposited using a low-pressure chemical-vapor deposition to provide good step coverage over an underlying integrated circuit structure. A rapid thermal anneal is performed using an ambient including diborane. The rapid thermal anneal causes the titanium to interact with underlying silicon to form titanium silicide. Concurrently, the diborane reacts with the titanium to form titanium boride. A composite barrier layer results. Aluminum is deposited and then patterned together with the composite barrier layer to define a first level metalization. Subsequent intermetal dielectrics, metalization, and passivation layers can be added to form a multi-level metal interconnect structure. The titanium boride prevents the aluminum from migrating into the silicon, while the titanium silicide lowers the contact resistivity associated with the barrier layer. The relatively close match of the thermal coefficients of expansion for titanium boride and silicon provides high thermal stability.
Inventors
- 👤 Chang-Ou Lee
- 👤 Landon B. Vines
- 👤 Felix H. Fujishiro
- 👤 Sigmund Koenigseder
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:28
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/052; H10W20/0526; H10D; H10D10/00; H10D10/01; H10D10/051; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D64/01125; H10W20/033; H10W20/047; H10W20/048; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49165
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
77 words
In the fabrication of an integrated circuit, a method of forming a contact between a relatively highly conductive metal and silicon, said relatively highly conductive metal being more conductive than titanium, said method comprising the steps of: depositing titanium so as to contact exposed silicon; rapid thermal annealing in a boron-bearing ambient so as to yield titanium silicide and titanium boride to form a barrier layer; and depositing said relatively highly conductive metal over said titanium boride.
Claim 2
Dependent Claim
77 words
In the fabrication of an integrated circuit, a method of forming a contact between a relatively highly conductive metal and silicon, said relatively highly conductive metal being more conductive than titanium, said method comprising the steps of: depositing titanium so as to contact exposed silicon; rapid thermal annealing in a boron-bearing ambient so as to yield titanium silicide and titanium boride to form a barrier layer; and depositing said relatively highly conductive metal over said titanium boride.
Claim 3
Dependent Claim
13 words
A method as recited in claim 1 wherein said boron-bearing ambient includes diborane.
Claim 4
Dependent Claim
29 words
A method as recited in claim 1 wherein said rapid thermal annealing step involves annealing at a temperature of at least 600° C. for between 30 and 90 seconds.
Claim 5
Dependent Claim
115 words
In the fabrication of an integrated circuit, a method of forming a contact between a relatively highly conductive metal and silicon, said relatively highly conductive metal being more conductive than titanium, said method comprising the steps of: depositing titanium so as to contact exposed silicon; rapid thermal annealing in a boron-bearing ambient so as to yield titanium silicide and titanium boride to form a barrier layer; depositing said relatively highly conductive metal over said titanium boride; patterning said highly conductive metal and said barrier layer to form contacts; depositing an intermetal dielectric; forming apertures in the intermetal dielectric to expose said contacts depositing a second highly conductive metal; and patterning said second highly conductive metal.
Claim 6
Dependent Claim
115 words
In the fabrication of an integrated circuit, a method of forming a contact between a relatively highly conductive metal and silicon, said relatively highly conductive metal being more conductive than titanium, said method comprising the steps of: depositing titanium so as to contact exposed silicon; rapid thermal annealing in a boron-bearing ambient so as to yield titanium silicide and titanium boride to form a barrier layer; depositing said relatively highly conductive metal over said titanium boride; patterning said highly conductive metal and said barrier layer to form contacts; depositing an intermetal dielectric; forming apertures in the intermetal dielectric to expose said contacts depositing a second highly conductive metal; and patterning said second highly conductive metal.
Claim 7
Dependent Claim
92 words
In the fabrication of an integrated circuit, a method of forming a contact between a relatively highly conductive metal and silicon, said relatively highly conductive metal being more conductive than titanium, said method comprising the steps of: depositing a submetal dielectric and forming apertures in said submetal dielectric to expose underlying silicon; depositing titanium so as to contact exposed silicon; rapid thermal annealing in a boron-bearing ambient so as to yield titanium silicide and titanium boride to form a barrier layer; and depositing said relatively highly conductive metal over said titanium boride.
Claim 8
Dependent Claim
92 words
In the fabrication of an integrated circuit, a method of forming a contact between a relatively highly conductive metal and silicon, said relatively highly conductive metal being more conductive than titanium, said method comprising the steps of: depositing a submetal dielectric and forming apertures in said submetal dielectric to expose underlying silicon; depositing titanium so as to contact exposed silicon; rapid thermal annealing in a boron-bearing ambient so as to yield titanium silicide and titanium boride to form a barrier layer; and depositing said relatively highly conductive metal over said titanium boride.
Claim 9
Dependent Claim
39 words
A method as recited in claim 5 wherein steps of depositing a dielectric and forming apertures therein to expose barrier material are performed between said step of depositing titanium and said step of depositing said relatively highly conductive metal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-05-04 | 2001-11-03 | 2002-05-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-05-04 | 2005-11-03 | 2006-05-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-05-04 | 2009-11-03 | 2010-05-05 | $7700.00 | Window Closed / Lapsed |