← Back to Patent Explorer
US5745757A Expired / Lapsed US ⏱️ 0.0 years remaining

Multiprocessor system with microprogrammed means for dispatching processes to processors

Assignee: Bull SAS
•
Filing: 1995-05-15
•
Granted: 1998-04-28
•
Expires: 2015-05-15
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract In a multiprocessor system, events capable of modifying the dispatching of processes to the processors (CPU, CPUi) start the execution of dispatching software charged with defining the new dispatching as a function of events and various data. When the number of processors (CPU, CPUi) is large, the microsoftware must be optimized. To that end, the microsoftware is subdivided into a plurality of specialized microprogram modules for determining the dispatching in response to respective categories of particular events. A central microprogram module takes into account the events other than those processed by the specialized modules.

Inventors

  • 👤 Georges Lecourtier

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 04:38
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4843; G06F9/4881

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 140 words
A multiprocessor information processing system, having a plurality of processors (CPU), each having microprogrammed means (CP) for performing dispatching of processes (JP) to the processors (CPU) of the system, means for activating said microprogrammed means (CP) in one of said processors (CPU) in response to an event detected by said processor (CPU) for causing a modification in selecting processes (JP) to be run and of processors (CPU) that run said processes, said microprogrammed means (CP) including at least one specialized microprogram module means (CHSEL, DQSEL, EQSEL) for determining said dispatching in response to a category of particular events by use of a pointer to a link of a last active process having a lowest priority, and central microprogram module means (CTSEL) for determining said dispatching for events other than those processed by said specialized microprogram module means (CHSEL, DQSEL, EQSEL).
Claim 2
Dependent Claim 140 words
A multiprocessor information processing system, having a plurality of processors (CPU), each having microprogrammed means (CP) for performing dispatching of processes (JP) to the processors (CPU) of the system, means for activating said microprogrammed means (CP) in one of said processors (CPU) in response to an event detected by said processor (CPU) for causing a modification in selecting processes (JP) to be run and of processors (CPU) that run said processes, said microprogrammed means (CP) including at least one specialized microprogram module means (CHSEL, DQSEL, EQSEL) for determining said dispatching in response to a category of particular events by use of a pointer to a link of a last active process having a lowest priority, and central microprogram module means (CTSEL) for determining said dispatching for events other than those processed by said specialized microprogram module means (CHSEL, DQSEL, EQSEL).
Claim 3
Dependent Claim 28 words
The system of claim 1, wherein each category of particular events includes events among those that have a strongest probability of occurring in the course of system operation.
Claim 4
Dependent Claim 34 words
The system of claim 2, wherein each category of particular events includes events that cause simple modifications in the selection of processes (JP) that are to be run and processors (CPU) that run them.
Claim 5
Dependent Claim 82 words
The system of claim 3, including means for memorizing the identity of the processes (JP) that can be run in the system either in a queue (Q/PR/S) of the processes waiting for an event, or in at least one queue (Q/PR/RDY) of ready processes including active processes in a processor or processes waiting for a processor, said category of particular events including events causing an addition, subtraction or displacement, respectively of a single process (JP) in the queue (Q/PR/RDY) of ready processes.
Claim 6
Dependent Claim 48 words
The system of claim 4, including first lock means (RDYLK) associated with the queue (Q/PR/RDY) of ready processes, said first lock means (RDYLK) being used by said microprogrammed means (CP) to assure that only one processor (CPU) at a time can modify the queue (Q/PR/RDY) of ready processes.
Claim 7
Dependent Claim 52 words
The system of claim 4, including at least one second lock means (SEMLK) associated with the queues (Q/PR/S), said at least one second lock means (SEMLK) being used by said microprogrammed means (CP) to assure that only one processor (CPU) at a time can modify the queue (Q/PR/S) of the waiting processes.
Claim 8
Dependent Claim 59 words
The system of claim 5, including at least one second lock means (SEMLK) associated with the queues (Q/PR/S) of the processes waiting for an event, said at least one second lock means (SEMLK) being used by said microprogrammed means (CP) to assure that only one processor (CPU) at a time can modify the queue (Q/PR/S) of the waiting processes.
Claim 9
Dependent Claim 29 words
The system of claim 2, wherein said specialized module means (CHSEL, DQSEL, EQSEL) include a plurality of modules for making a call to said central microgrogrammed module means (CTSEL).
Claim 10
Dependent Claim 26 words
The system of claim 1, wherein said specialized module means (CHSEL, DQSEL, EQSEL) are operable to make a call to said central microprogrammed module means (CTSEL).
Claim 11
Dependent Claim 127 words
The system of claim 9, further including dialog means for dialog between processes used by said microprogrammed means (CP) of a processor (CPU) in order to issue requests (EXECi) notifying other processors (CPUi) of the identity of new processes (NJP) to be run, and said dialog means are associated with a first dialog lock (MPDL) used by said microprogrammed means (CP) to assure that only one processor (CPU) at a time will issue said requests (EXECi) and that each specialized microprogrammed module means is constructed and arranged so as to stop execution and make a call to said central microprogrammed module means (CTSEL) in the event that execution of said specialized microprogrammed module means (CHSEL, DQSEL, EQSEL) involves a dialog while said first lock (MPDL) is engaged.
Claim 12
Dependent Claim 133 words
The system of claim 10, wherein said dialog means include a mailbox (CPCB) associated with each processor (CPU) and adapted to be used by said microprogrammed means (CP) to transmit said requests (EXECi), that each mailbox (CPCB) is associated with a second lock (DCLK), which is put in an occupied state by the processor (CPU) issuing requests (EXECi) and is unlocked by the processor (CPUi) after execution of the request that was addressed thereto and that each specialized microprogrammed module means is constructed and arranged so as to stop execution and to make the call to said central module (CTSEL) in the event that the execution of said specialized microprogrammed module means (CHSEL, DQSEL, EQSEL) involves sending of a request (EXECi) to a processor (CPUi) while the second lock (DCLK) thereof is engaged.
Claim 13
Dependent Claim 67 words
The system of claim 1, further including a constraint indicator (CST), whose state is indicative of an existence in the system of processes (JP) with constraints, and that said microprogrammed means (CP) are constructed and arranged such that the dispatching of the processes (JP) to the processors (CPU) is effected by said central microprogrammed module means (CTSEL) when said constraint indicator (CST) signals the existence of constraints.
Claim 14
Dependent Claim 43 words
The system of claim 1, wherein there is a plurality of categories of events and each category of particular events includes events that cause simple modifications in the selection of processes (JP) that are to be run and processors (CPU) that run them.
Claim 15
Dependent Claim 82 words
The system of claim 13, including means for memorizing the identity of the processes (JP) that can be run in the system either in a queue (Q/PR/S) of the processes waiting for an event, or in at least one queue (Q/PR/RDY) of ready processes including active processes in a processor and processes waiting for a processor, said category of particular events including events causing an addition, subtraction or displacement, respectively of a single process (JP) in the queue (Q/PR/RDY) of ready processes.
Claim 16
Dependent Claim 48 words
The system of claim 14, including first lock means (RDYLK) associated with the queue (Q/PR/RDY) of ready processes, said first lock means (RDYLK) being used by said microprogrammed means (CP) to assure that only one processor (CPU) at a time can modify the queue (Q/PR/RDY) of ready processes.
Claim 17
Dependent Claim 59 words
The system of claim 14, including at least one second lock means (SEMLK) associated with the queues (Q/PR/S) of the processes waiting for an event, said at least one second lock means (SEMLK) being used by said microprogrammed means (CP) to assure that only one processor (CPU) at a time can modify the queue (Q/PR/S) of the waiting processes.
Claim 18
Dependent Claim 30 words
The system of claim 14, wherein said specialized module means (CHSEL, DQSEL, EQSEL) include a plurality of modules operable to make a call to said central microprogrammed module means (CTSEL).
Claim 19
Dependent Claim 29 words
The system of claim 15, wherein said specialized module means (CHSEL, DQSEL, EQSEL) include a plurality of modules for making a call to said central microprogrammed module means (CTSEL).
Claim 20
Dependent Claim 29 words
The system of claim 16, wherein said specialized module means (CHSEL, DQSEL, EQSEL) include a plurality of modules for making a call to said central microprogrammed module means (CTSEL).
Claim 21
Dependent Claim 29 words
The system of claim 13, wherein said specialized module means (CHSEL, DQSEL, EQSEL) include a plurality of modules for making a call to said central microprogrammed module means (CTSEL).

References Cited (Backward Citations)

US4286322A Cited
US4590555A Cited
US4318173A Cited
EP0064142A2 Cited
US4394727A Cited
US4590550A Cited
US4914570A Cited
US4965716A Cited
US5293620A Cited
US5202989A Cited
US5179702A Cited
US5452452A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-04-27 2001-10-27 2002-04-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-04-27 2005-10-27 2006-04-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-04-27 2009-10-27 2010-04-28 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag