EP0064142A2
Expired / Lapsed
EP
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Multiprocessor system comprising a task handling arrangement
Assignee: International Business Machines Corp
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Filing: 1982-03-09
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Granted: —
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Expires: 2002-03-09
Abstract
Abstract The task handling arrangement is provided in a multiprocessor system in which each processor (5) includes a task dispatcher and a signal dispatcher. The signal dispatcher runs in a processor whenever a task dispatching element (TDE) is put on the task dispatching queue (TDQ) as a result of the task running in the processor. The signal dispatcher examines the TDEs enqueued on the TDQ and determines if any task dispatcher should be invoked, i.e. if any processor is running a lower priority task a task switch should occur. If so, it signals the selected processor to invoke its task dispatcher. After completing the task switch, the selected processor must invoke its signal dispatcher to determine if the task it had been performing should now be performed on some other processor in the multiprocessor system.
Inventors
- 👤 Roy Louis Hoffman
- 👤 Merle Edward Houdek
- 👤 Larry Wayne Loen
- 👤 Frank Gerald Soltis
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 19:49
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4843; G06F9/4881
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
195 words
Task handling arrangement for a multiprocessor computer system including at least two processors sharing a common main storage containing a task dispatching queue adapted to have task dispatching elements enqueued in priority sequence, each processor having a task dispatcher for dispatching task dispatching elements from said task dispatching queue and for performing task switches when the associated processor is processing a task dispatching element having a priority lower than the priority of a waiting dispatchable task dispatching element on said task dispatching queue, each processor having an enqueueing mechanism for returning waiting non-dispatchable task dispatching elements to said task dispatching queue, said arrangement being characterized in that it comprises : a signal dispatcher for each processor for scanning the priorities of task dispatching elements on said task dispatching queue and signaling another processor to operate its task dispatcher upon finding a task dispatching element on said task dispatching queue having a priority higher than the priority of the task dispatching element being processed by the processor to be signaled, said signal dispatcher being rendered operable in response to said enqueueing mechanism of the associated processor enqueueing a task dispatching element on said task dispatching queue.
Claim 2
Dependent Claim
195 words
Task handling arrangement for a multiprocessor computer system including at least two processors sharing a common main storage containing a task dispatching queue adapted to have task dispatching elements enqueued in priority sequence, each processor having a task dispatcher for dispatching task dispatching elements from said task dispatching queue and for performing task switches when the associated processor is processing a task dispatching element having a priority lower than the priority of a waiting dispatchable task dispatching element on said task dispatching queue, each processor having an enqueueing mechanism for returning waiting non-dispatchable task dispatching elements to said task dispatching queue, said arrangement being characterized in that it comprises : a signal dispatcher for each processor for scanning the priorities of task dispatching elements on said task dispatching queue and signaling another processor to operate its task dispatcher upon finding a task dispatching element on said task dispatching queue having a priority higher than the priority of the task dispatching element being processed by the processor to be signaled, said signal dispatcher being rendered operable in response to said enqueueing mechanism of the associated processor enqueueing a task dispatching element on said task dispatching queue.
Claim 3
Dependent Claim
28 words
Arrangement according to claim 1 wherein each task dispatching element includes an encoded field for indicating which of said processors are eligible to process said task dispatching element.
Claim 4
Dependent Claim
29 words
Arrangement according to claim 1 or claim 2 wherein each task dispatching element includes an encoded field for indicating which processor, if any, is processing said task dispatching element.
Claim 5
Dependent Claim
34 words
Arrangement according to any one of claims 1, 2 or 3 wherein said processor signaled to operate its task dispatcher, to perform a task switch, operates its signal dispatcher upon completing said task switch.
Claim 6
Dependent Claim
56 words
Arrangement according to any one of the preceding claims further comprising locking means selectively operable for locking access to said main storage, unlocking means selectively operable for unlocking access to said main storage, each of said task dispatchers, said signals dispatchers and said enqueueing mechanisms including means for selectively operating said locking and said unlocking means.
Claim 7
Dependent Claim
31 words
Arrangement according to claim 5 wherein the signal dispatcher of one processor selectively operates said locking means and the task dispatcher in the processor being signaled selectively operates said unlocking means.
References Cited (Backward Citations)
No citation records indexed.
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