US5744371A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Asymmetrical p-channel transistor having a boron migration barrier and LDD implant only in the drain region
Assignee: Advanced Micro Devices Inc
•
Filing: 1996-10-01
•
Granted: 1998-04-28
•
Expires: 2016-10-01
Abstract
Abstract Various processes are provided for producing a p-channel and/or n-channel transistor. The present processes are thereby applicable to NMOS, PMOS or CMOS integrated circuits, any of which derive a benefit from having an asymmetrical LDD structure. The asymmetrical structure can be produced on a p-channel or n-channel transistor in various ways. According, the present process employs various techniques to form an asymmetrical transistor. The various techniques employ processing steps which vary depending upon the LDD result desired. First, the LDD implant can be performed only in the drain-side of the channel, or in the drain-side as well as the source-side. Second, the gate conductor sidewall surface adjacent the drain can be made thicker than the sidewall surface adjacent the source. Thickening of the drain-side sidewall spacer can be achieved either by depositing oxide upon a nitride-bearing film, or by growing additional oxide upon an exposed silicon surface having the source-side sidewall protected from growth. Third, the drain-side can be enhanced relative to the source-side by using an LTA implant. There may be numerous other modifications and alternative processing steps, all of which are described herein. Regardless of the sequence chosen, a barrier implant may be employed to prevent deleterious ingress of p-type implant species into the channel region. The present fabrication sequence reduces source-side resistance to enhance drive current--a desirable outcome for high speed circuits.
Inventors
- 👤 Daniel Kadosh
- 👤 Brad T. Moore
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 14:46
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D30/00; H10D30/01; H10D30/021; H10D30/0221; H10D30/60; H10D30/601; H10D30/603; H10D64/01332; H10D64/01336; H10D64/01338; H10D64/60; H10D64/66; H10D64/661; H10D30/605
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
216 words
A method for forming a p-channel transistor, comprising: forming a layer of gate oxide upon a silicon substrate and thereafter forming a layer of polycrystalline silicon upon said gate oxide; implanting a first p-type dopant into said polycrystalline silicon at a peak concentration density residing at a first depth below an upper surface of said polycrystalline silicon and implanting barrier atoms into said polycrystalline silicon at a peak concentration density residing at a second depth below the upper surface of said polycrystalline silicon, wherein said second depth is greater than said first depth; removing portions of said implanted polycrystalline silicon and gate oxide to form a gate conductor interposed between an exposed pair of silicon substrate regions comprising a source region and a drain region; depositing a layer of nitride across said drain region, said source region and said gate conductor; forming an opening through said layer of nitride to expose only said drain region and a sidewall surface of said gate conductor adjacent said drain region; implanting a second p-type dopant through said opening and into the exposed said drain region; growing a drain-side spacer oxide upon the exposed said drain region and said sidewall surface; removing said layer of nitride; and implanting a third p-type dopant into said source region and said drain region.
Claim 2
Independent Claim
216 words
A method for forming a p-channel transistor, comprising: forming a layer of gate oxide upon a silicon substrate and thereafter forming a layer of polycrystalline silicon upon said gate oxide; implanting a first p-type dopant into said polycrystalline silicon at a peak concentration density residing at a first depth below an upper surface of said polycrystalline silicon and implanting barrier atoms into said polycrystalline silicon at a peak concentration density residing at a second depth below the upper surface of said polycrystalline silicon, wherein said second depth is greater than said first depth; removing portions of said implanted polycrystalline silicon and gate oxide to form a gate conductor interposed between an exposed pair of silicon substrate regions comprising a source region and a drain region; depositing a layer of nitride across said drain region, said source region and said gate conductor; forming an opening through said layer of nitride to expose only said drain region and a sidewall surface of said gate conductor adjacent said drain region; implanting a second p-type dopant through said opening and into the exposed said drain region; growing a drain-side spacer oxide upon the exposed said drain region and said sidewall surface; removing said layer of nitride; and implanting a third p-type dopant into said source region and said drain region.
Claim 3
Dependent Claim
29 words
The method as recited in claim 1, wherein said source region and said drain region comprise areas of said silicon substrate prior to first and second p-type dopant implantations.
Claim 4
Dependent Claim
33 words
The method as recited in claim 1, wherein said second p-type dopant is implanted into said drain region at a concentration less than the concentration at which said third p-type dopant is implanted.
Claim 5
Dependent Claim
16 words
The method as recited in claim 1, wherein said second and third p-type dopant comprises boron.
Claim 6
Dependent Claim
33 words
The method as recited in claim 1, wherein said forming comprises selectively removing said layer of nitride only above said drain region and a portion of said gate conductor adjacent said drain region.
Claim 7
Dependent Claim
25 words
The method as recited in claim 1, wherein said growing comprises subjecting the exposed said drain region and said sidewall surface to an oxidizing agent.
Claim 8
Dependent Claim
34 words
The method as recited in claim 1, wherein the steps of implanting said first, second and third p-type dopants comprises implanting at an angle approximately perpendicular to an upper surface of said silicon substrate.
Claim 9
Dependent Claim
32 words
The method as recited in claim 1, further comprising growing a symmetrical spacer oxide upon said gate conductor, said drain and said source before the step of growing said drain-side spacer oxide.
Claim 10
Dependent Claim
33 words
The method as recited in claim 8, wherein said growing the symmetrical oxide comprises growing silicon dioxide upon opposed sidewall surfaces of said gate conductor adjacent said source region and said drain region.
Claim 11
Dependent Claim
34 words
The method as recited in claim 1, wherein said drain-side spacer oxide is grown on said sidewall surface which extends as a lateral surface of said gate conductor substantially perpendicular to said silicon substrate.
Claim 12
Dependent Claim
48 words
The method as recited in claim 1, wherein said gate conductor is formed by the steps of: depositing a layer of polycrystalline silicon upon a dielectric which resides directly upon said silicon substrate; doping said layer of polycrystalline silicon; and removing portions of said layer of polycrystalline silicon.
Claim 13
Dependent Claim
17 words
The method as recited in claim 1, wherein said barrier atoms comprise inert atoms or non-dopant atoms.
Claim 14
Dependent Claim
13 words
The method as recited in claim 1, wherein said barrier atoms comprise nitrogen.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-04-27 | 2001-10-27 | 2002-04-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-04-27 | 2005-10-27 | 2006-04-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-04-27 | 2009-10-27 | 2010-04-28 | $7700.00 | Window Closed / Lapsed |