Phase frequency detecting circuit

Claim 2

A phase frequency detecting circuit comprising: a first phase frequency comparator for producing a first phase error signal which is proportional to a difference between a base phase and a reference phase inputted thereto; a first integration circuit for performing integration on the first phase error signal to produce a control voltage; an inverter circuit for effecting phase inversion on the base phase to produce an inverted base phase; a first frequency divider for performing a frequency dividing operation on the inverted base phase to produce a frequency-divided base phase; a second frequency divider for performing a frequency dividing operation on the reference phase to produce a frequency-divided reference phase; a second phase frequency comparator for producing a second phase error signal which is proportional to a difference between the frequency-divided base phase and the frequency-divided reference phase; a second integration circuit for performing integration on the second phase error signal to produce a frequency-divided control voltage; an offset voltage creating circuit for producing an offset voltage based on the control voltage and the frequency-divided control voltage; and an offset imparting circuit, receiving said offset voltage and said frequency-divided control voltage, for imparting the offset voltage to the frequency-divided control voltage to produce an output voltage.

Claim 3

A phase frequency detecting circuit as defined in claim 1 further comprising an amplifier which amplifies the frequency-divided control voltage, outputted from the second integration circuit, to produce an amplified output voltage, wherein the amplified output voltage is used instead of the frequency-divided control voltage and is delivered to the offset voltage creating circuit and the offset imparting circuit.

Claim 4

A phase synchronization circuit comprising: a first phase frequency comparator for producing a first phase error signal which is proportional to a difference between a base phase and a reference phase inputted thereto; a first integration circuit for performing integration on the first phase error signal to produce a control voltage; an inverter circuit for effecting phase inversion on the base phase to produce an inverted base phase; a first frequency divider for performing a frequency dividing operation on the inverted base phase to produce a frequency-divided base phase; a second frequency divider for performing a frequency dividing operation on the reference phase to produce a frequency-divided reference phase; a second phase frequency comparator for producing a second phase error signal which is proportional to a difference between the frequency-divided base phase and the frequency-divided reference phase; a second integration circuit for performing integration on the second phase error signal to produce a frequency-divided control voltage; an offset voltage creating circuit for producing an offset voltage based on the control voltage and the frequency-divided control voltage; an offset imparting circuit, receiving said offset voltage and said frequency-divided control voltage, for imparting the offset voltage to the frequency-divided control voltage to produce an output voltage; and a dependent oscillator whose oscillation frequency is controlled by the output voltage of the offset imparting circuit to produce the reference phase.

Claim 5

A phase synchronization circuit comprising: a first phase frequency comparator for producing a first phase error signal which is proportional to a difference between a base phase and a reference phase inputted thereto; a first integration circuit for performing integration on the first phase error signal to produce a control voltage; an inverter circuit for effecting phase inversion on the base phase to produce an inverted base phase; a first frequency divider for performing a frequency dividing operation on the inverted base phase to produce a frequency-divided base phase; a second frequency divider for performing a frequency dividing operation on the reference phase to produce a frequency-divided reference phase; a second phase frequency comparator for producing a second phase error signal which is proportional to a difference between the frequency-divided base phase and the frequency-divided reference phase; a second integration circuit for performing integration on the second phase error signal to produce a frequency-divided control voltage; an offset voltage creating circuit for producing an offset voltage based on the control voltage and the frequency-divided control voltage; an offset imparting circuit, receiving said offset voltage and said frequency-divided control voltage, for imparting the offset voltage to the frequency-divided control voltage to produce an output voltage; and a dependent oscillator whose oscillation frequency is controlled by the output voltage of the offset imparting circuit to produce the reference phase.

Claim 6

An angle-modulation phase synchronization circuit comprising: a first phase frequency comparator for producing a first phase error signal which is proportional to a difference between a base phase and a reference phase inputted thereto; a first integration circuit for performing integration on the first phase error signal to produce a control voltage; an inverter circuit for effecting phase inversion on the base phase to produce an inverted base phase; a first frequency divider for performing a frequency dividing operation on the inverted base phase to produce a frequency-divided base phase; a second frequency divider for performing a frequency dividing operation on the reference phase to produce a frequency-divided reference phase; a second phase frequency comparator for producing a second phase error signal which is proportional to a difference between the frequency-divided base phase and the frequency-divided reference phase; a second integration circuit for performing integration on the second phase error signal to produce a frequency-divided control voltage; an offset voltage creating circuit for producing an offset voltage based on the control voltage and the frequency-divided control voltage; an offset imparting circuit, receiving said offset voltage and said frequency-divided control voltage, for imparting the offset voltage to the frequency-divided control voltage to produce an output voltage; an angle-modulation oscillator for producing a modulation signal; an addition circuit for adding the modulation signal to the output voltage of the offset imparting circuit to produce an addition voltage; and a dependent oscillator whose oscillation frequency is controlled by the addition voltage of the addition circuit to produce the reference phase which is subjected to angle modulation by the modulation signal.

Claim 7

An angle-modulation phase synchronization circuit comprising: a first phase frequency comparator for producing a first phase error signal which is proportional to a difference between a base phase and a reference phase inputted thereto; a first integration circuit for performing integration on the first phase error signal to produce a control voltage; an inverter circuit for effecting phase inversion on the base phase to produce an inverted base phase; a first frequency divider for performing a frequency dividing operation on the inverted base phase to produce a frequency-divided base phase; a second frequency divider for performing a frequency dividing operation on the reference phase to produce a frequency-divided reference phase; a second phase frequency comparator for producing a second phase error signal which is proportional to a difference between the frequency-divided base phase and the frequency-divided reference phase; a second integration circuit for performing integration on the second phase error signal to produce a frequency-divided control voltage; an offset voltage creating circuit for producing an offset voltage based on the control voltage and the frequency-divided control voltage; an offset imparting circuit, receiving said offset voltage and said frequency-divided control voltage, for imparting the offset voltage to the frequency-divided control voltage to produce an output voltage; an angle-modulation oscillator for producing a modulation signal; an addition circuit for adding the modulation signal to the output voltage of the offset imparting circuit to produce an addition voltage; and a dependent oscillator whose oscillation frequency is controlled by the addition voltage of the addition circuit to produce the reference phase which is subjected to angle modulation by the modulation signal.

Claim 8

An angle-modulation phase synchronization circuit as defined in claim 4 wherein the angle modulation is either frequency modulation or phase modulation.

Claim 9

A phase frequency detecting circuit comprising: a first phase frequency comparator for producing a first phase error signal which is proportional to an input phase difference between a base phase and a reference phase; a first integration circuit for performing integration on the first phase error signal to produce a first control voltage; first phase creating means for creating a first phase which is inverse to the base phase and whose frequency is an integral submultiple of a frequency of the base phase; second phase creating means for creating a second phase whose frequency is an integral submultiple of a frequency of the reference phase; a second phase frequency comparator for producing a second phase error signal which is proportional to a phase difference between the first phase and the second phase; a second integration circuit for performing integration on the second phase error signal to produce a second control voltage; an offset voltage creating circuit for creating an offset voltage whose value is determined in response to the second control voltage, wherein the offset voltage is created together with a sign which is determined responsive to a relationship between the first control voltage and the second control voltage; and offset imparting circuit for adding the offset voltage to the second control voltage, so that output voltage of the offset imparting circuit is produced by amplifying result of addition by a factor arbitrarily selected.

Claim 10

A phase frequency detecting circuit comprising: a first phase frequency comparator for producing a first phase error signal which is proportional to an input phase difference between a base phase and a reference phase; a first integration circuit for performing integration on the first phase error signal to produce a first control voltage; first phase creating means for creating a first phase which is inverse to the base phase and whose frequency is an integral submultiple of a frequency of the base phase; second phase creating means for creating a second phase whose frequency is an integral submultiple of a frequency of the reference phase; a second phase frequency comparator for producing a second phase error signal which is proportional to a phase difference between the first phase and the second phase; a second integration circuit for performing integration on the second phase error signal to produce a second control voltage; an offset voltage creating circuit for creating an offset voltage whose value is determined in response to the second control voltage, wherein the offset voltage is created together with a sign which is determined responsive to a relationship between the first control voltage and the second control voltage; and offset imparting circuit for adding the offset voltage to the second control voltage, so that output voltage of the offset imparting circuit is produced by amplifying result of addition by a factor arbitrarily selected.

Claim 11

A phase frequency detecting circuit as defined in claim 6 further comprising an amplifier for amplifying the second control voltage by a factor arbitrarily selected to produce a third control voltage, so that the third control voltage is used instead of the second control voltage and is delivered to the offset voltage creating circuit and the offset imparting circuit.

Claim 12

A phase frequency detecting circuit as defined in claim 6 wherein the first phase creating means and the second phase creating means are designed to perform frequency dividing operations respectively such that a frequency of the first control voltage becomes substantially double of a frequency of the second control voltage.