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US5728620A Expired / Lapsed US ⏱️ 0.0 years remaining

Isolation method of semiconductor device

Assignee: Samsung Electronics Co Ltd
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Filing: 1996-01-25
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Granted: 1998-03-17
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Expires: 2016-01-25
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Abstract

Abstract A device isolation method divides a semiconductor substrate into active and inactive regions. A first device isolation layer is formed in a first inactive region using a trench isolation method. Then, local oxidation is used to form a second device isolation layer in a second inactive region which is wider than the first. A dishing phenomenon (generated during CMP processing) is eliminated, and proper device isolation is realized without exposing the active region.

Inventors

  • 👤 Moon-han Park

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 13:35
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/012; H10W10/10; H10W10/13; H10W10/17

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 98 words
An isolation method of a semiconductor device, comprising the steps of: forming a first device isolation layer in a first inactive region of a semiconductor substrate by a trench isolation method; and forming a second device isolation layer in a second inactive region which is wider than the first inactive region by a local oxidation method; wherein a distance between said first device isolation layer and said second device isolation layer is less than 2000 Å; and wherein said first inactive region exists in a cell array portion and said second inactive region exists in a peripheral portion.
Claim 2
Dependent Claim 98 words
An isolation method of a semiconductor device, comprising the steps of: forming a first device isolation layer in a first inactive region of a semiconductor substrate by a trench isolation method; and forming a second device isolation layer in a second inactive region which is wider than the first inactive region by a local oxidation method; wherein a distance between said first device isolation layer and said second device isolation layer is less than 2000 Å; and wherein said first inactive region exists in a cell array portion and said second inactive region exists in a peripheral portion.
Claim 3
Dependent Claim 23 words
An isolation method as claimed in claim 1, wherein said first device isolation layer is formed of a chemical vapor deposition oxide layer.
Claim 4
Dependent Claim 43 words
An isolation method as claimed in claim 1, wherein the boundary of said first device isolation layer and said second device isolation layer is formed at a bird's beak region generated during said local oxidation method for forming said second device isolation layer.
Claim 5
Dependent Claim 128 words
An isolation method of a semiconductor device, comprising the steps of: forming a first pattern on a semiconductor substrate to expose a first inactive region of said substrate; etching the exposed semiconductor substrate by said first pattern to form a trench; forming a first device isolation layer by filling insulating material in the trench; forming a second pattern on the semiconductor substrate to expose a second inactive region of the substrate; and forming a second device isolation layer in the second inactive region by local oxidation; wherein a distance between said first device isolation layer and said second device isolation layer is less than 2000 Å; and wherein said first inactive region exists in the cell array portion and said second inactive region exists in the peripheral portion.
Claim 6
Dependent Claim 128 words
An isolation method of a semiconductor device, comprising the steps of: forming a first pattern on a semiconductor substrate to expose a first inactive region of said substrate; etching the exposed semiconductor substrate by said first pattern to form a trench; forming a first device isolation layer by filling insulating material in the trench; forming a second pattern on the semiconductor substrate to expose a second inactive region of the substrate; and forming a second device isolation layer in the second inactive region by local oxidation; wherein a distance between said first device isolation layer and said second device isolation layer is less than 2000 Å; and wherein said first inactive region exists in the cell array portion and said second inactive region exists in the peripheral portion.
Claim 7
Dependent Claim 24 words
An isolation method of a semiconductor device according to claim 4, wherein said first device isolation layer is formed of a CVD oxide layer.
Claim 8
Dependent Claim 32 words
An isolation method as claimed in claim 4, wherein, after the step of forming said first device isolation layer, said first device isolation layer is etched back by using a CMP method.
Claim 9
Dependent Claim 34 words
An isolation method as claimed in claim 4, wherein, after the step of forming said first device isolation layer, said first device isolation layer is etched back by using a reactive ion etching method.
Claim 10
Dependent Claim 34 words
An isolation method as claimed in claim 4, wherein, in the step of forming second device isolation layer, a bird's beak is generated during said local oxidation and shares a boundary with said trench.
Claim 11
Independent Claim 102 words
A method of forming an isolation region in a semiconductor device, comprising the steps of: forming a narrow isolation region in a first inactive region of a semiconductor substrate by a trench isolation method; and forming a wide isolation layer in a second inactive region which is wider than the first inactive region by a local oxidation method; wherein said local oxidation method forms a bird's-beak which prevents exposure of an active region between said narrow and wide isolation regions and wherein said first inactive region exists in a cell array portion and said second inactive region exists in a peripheral portion.
Claim 12
Independent Claim 102 words
A method of forming an isolation region in a semiconductor device, comprising the steps of: forming a narrow isolation region in a first inactive region of a semiconductor substrate by a trench isolation method; and forming a wide isolation layer in a second inactive region which is wider than the first inactive region by a local oxidation method; wherein said local oxidation method forms a bird's-beak which prevents exposure of an active region between said narrow and wide isolation regions and wherein said first inactive region exists in a cell array portion and said second inactive region exists in a peripheral portion.

References Cited (Backward Citations)

US4892614A Cited
US4980311A Cited
US4994406A Cited
US5116779A Cited
US5130268A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-03-16 2001-09-15 2002-03-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-03-16 2005-09-15 2006-03-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-03-16 2009-09-15 2010-03-17 $7700.00 Window Closed / Lapsed

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