US5717253A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Structure for forming an improved quality silicidation layer
Assignee: Samsung Electronics Co Ltd
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Filing: 1996-10-24
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Granted: 1998-02-10
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Expires: 2016-10-24
Abstract
Abstract A semiconductor device having a silicide layer with substantially even thickness, and a method for making a silicide layer having substantially even thickness in a semiconductor device are disclosed. A prefereably doped polycrystalline silicon layer is formed as a first conductive layer on an insulating underneath layer. After that, an undoped polycrystalline silicon is deposited on the first conductive layer as a buffer layer for preventing silicon diffusion. A second conductive layer is formed thereon. Subsequently, a refractory metal layer is formed on the second conductive layer, and a heating treatment is carried out to form a silicide layer on the first conductive layer from the materials of the buffer layer, second conductive layer and refractory metal layer.
Inventors
- 👤 Heon-jong Shin
- 👤 Yunheub Song
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:15
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/0131; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/064; H10W20/066
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
92 words
A pre-silicidation semiconductor device portion which is heat-treatable to obtain a silicide layer having smooth upper and lower surfaces comprising: a semiconductor substrate; an insulating layer formed on said semiconductor substrate; a polysilicon layer formed on said insulating layer; a diffusion barrier layer formed on said polysilicon layer; an upper silicon layer formed on said diffusion barrier layer, wherein said diffusion barrier layer comprises a means for preventing particles in said polysilicon layer from diffusing into said silicon layer during silicidation; and a refractory metal layer formed on said upper silicon layer.
Claim 2
Dependent Claim
92 words
A pre-silicidation semiconductor device portion which is heat-treatable to obtain a silicide layer having smooth upper and lower surfaces comprising: a semiconductor substrate; an insulating layer formed on said semiconductor substrate; a polysilicon layer formed on said insulating layer; a diffusion barrier layer formed on said polysilicon layer; an upper silicon layer formed on said diffusion barrier layer, wherein said diffusion barrier layer comprises a means for preventing particles in said polysilicon layer from diffusing into said silicon layer during silicidation; and a refractory metal layer formed on said upper silicon layer.
Claim 3
Dependent Claim
26 words
A pre-silicidation semiconductor device portion as set forth in claim 1, wherein said diffusion barrier layer is formed of an oxide layer or a TiN layer.
Claim 4
Dependent Claim
25 words
A pre-silicidation semiconductor device portion as set forth in claim 1, wherein said diffusion barrier layer is an impurity-doped part of said first conductive layer.
Claim 5
Dependent Claim
28 words
A pre-silicidation semiconductor device portion as set forth in claim 3, wherein said impurity-doped part of said first conductive layer is doped with nitride ions or nitride molecules.
Claim 6
Dependent Claim
36 words
A pre-silicidation semiconductor device portion as set forth in claim 1, wherein said second conductive layer is formed of a material selected from the group consisting of an undoped amorphous silicon and an undoped polycrystalline silicon.
Claim 7
Dependent Claim
32 words
A pre-silicidation semiconductor device portion as set forth in claim 1, wherein said refractory metal is formed of a material selected from the group consisting of Zr, Hf, V, Nb, and Ta.
Claim 8
Dependent Claim
23 words
A pre-silicidation semiconductor device portion as set forth in claim 1, wherein said first conductive layer is made from a doped polycrystalline silicon.
Claim 9
Dependent Claim
23 words
A pre-silicidation semiconductor device portion as set forth in claim 7, wherein said second conductive layer is made from an undoped amorphous silicon.
Claim 10
Dependent Claim
23 words
A pre-silicidation semiconductor device portion as set forth in claim 7, wherein said second conductive layer is made from an undoped polycrystalline silicon.
Claim 11
Dependent Claim
91 words
A pre-silicidation semiconductor device portion which is heat-treatable to obtain a silicide layer having smooth upper and lower surfaces comprising: a semiconductor substrate; an insulating layer formed on said semiconductor substrate; a polysilicon layer formed on said insulating layer; a diffusion barrier layer formed on said polysilicon layer; an upper silicon layer formed on said diffusion barrier layer, wherein said diffusion barrier layer possesses structure which prevents particles in said polysilicon layer from diffusing into said silicon layer during silicidation; and a refractory metal layer formed on said upper silicon layer.
Claim 12
Dependent Claim
91 words
A pre-silicidation semiconductor device portion which is heat-treatable to obtain a silicide layer having smooth upper and lower surfaces comprising: a semiconductor substrate; an insulating layer formed on said semiconductor substrate; a polysilicon layer formed on said insulating layer; a diffusion barrier layer formed on said polysilicon layer; an upper silicon layer formed on said diffusion barrier layer, wherein said diffusion barrier layer possesses structure which prevents particles in said polysilicon layer from diffusing into said silicon layer during silicidation; and a refractory metal layer formed on said upper silicon layer.
Claim 13
Dependent Claim
26 words
A pre-silicidation semiconductor device portion as set forth in claim 10, wherein said diffusion barrier layer is formed of an oxide layer or a TiN layer.
Claim 14
Dependent Claim
25 words
A pre-silicidation semiconductor device portion as set forth in claim 10, wherein said diffusion barrier layer is an impurity-doped part of said first conductive layer.
Claim 15
Dependent Claim
28 words
A pre-silicidation semiconductor device portion as set forth in claim 12, wherein said impurity-doped part of said first conductive layer is doped with nitride ions or nitride molecules.
Claim 16
Dependent Claim
36 words
A pre-silicidation semiconductor device portion as set forth in claim 10, wherein said second conductive layer is formed of a material selected from the group consisting of an undoped amorphous silicon and an undoped polycrystalline silicon.
Claim 17
Dependent Claim
32 words
A pre-silicidation semiconductor device portion as set forth in claim 10, wherein said refractory metal is formed of a material selected from the group consisting of Zr, Hf, V, Nb, and Ta.
Claim 18
Dependent Claim
23 words
A pre-silicidation semiconductor device portion as set forth in claim 10, wherein said first conductive layer is made from a doped polycrystalline silicon.
Claim 19
Dependent Claim
23 words
A pre-silicidation semiconductor device portion as set forth in claim 16, wherein said second conductive layer is made from an undoped amorphous silicon.
Claim 20
Dependent Claim
23 words
A pre-silicidation semiconductor device portion as set forth in claim 16, wherein said second conductive layer is made from an undoped polycrystalline silicon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-02-09 | 2001-08-11 | 2002-02-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-02-09 | 2005-08-11 | 2006-02-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-02-09 | 2009-08-11 | 2010-02-10 | $7700.00 | Window Closed / Lapsed |