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US5715274A
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US
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Method and system for communicating between a plurality of semiconductor devices
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1995-01-09
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Granted: 1998-02-03
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Expires: 2015-01-09
Abstract
Abstract Serial high speed interconnect devices are integrated with semiconductor devices for simple and reliable communications and control between a plurality of semiconductor devices. The serial high speed interconnect devices transfer the data serially at a rate fast enough to replace large parallel data and address buses that require one conductive path per bit of data. Eliminating large parallel data and address buses allows the integrated circuit containing the semiconductor device to be smaller, simpler and lower in cost. The subsequent reduction in the size of the integrated circuits improves the layout density of electronic systems and reduces crosstalk and other undesirable signal transfer anomalies. The serial high speed interconnection devices are implemented with a low cost serial interface circuit technology that may be easily implemented on a semiconductor die in conjunction with the main circuits.
Inventors
- 👤 Michael D. Rostoker
- 👤 Scott A. Macomber
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 07:02
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/0264; H04L25/0278; H10; H10W; H10W72/00
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
134 words
A method for communicating between a plurality of semiconductor devices, comprising the steps of: transmitting digital information in parallel on a plurality of high speed signal lines connected between a plurality of semiconductor devices when in a serial link disable model; serially encoding the digital information from the plurality of semiconductor devices when in a serial link enable mode; transmitting the serially encoded digital information on at least one of the high speed signal lines connected between the plurality of semiconductor devices when in the serial link enable mode; receiving the serially encoded digital information on the at least one high speed signal line when in the serial link enable mode; and decoding the received serially encoded digital information for use by the plurality of semiconductor devices when in the serial link enable mode.
Claim 2
Independent Claim
134 words
A method for communicating between a plurality of semiconductor devices, comprising the steps of: transmitting digital information in parallel on a plurality of high speed signal lines connected between a plurality of semiconductor devices when in a serial link disable model; serially encoding the digital information from the plurality of semiconductor devices when in a serial link enable mode; transmitting the serially encoded digital information on at least one of the high speed signal lines connected between the plurality of semiconductor devices when in the serial link enable mode; receiving the serially encoded digital information on the at least one high speed signal line when in the serial link enable mode; and decoding the received serially encoded digital information for use by the plurality of semiconductor devices when in the serial link enable mode.
Claim 3
Independent Claim
102 words
A system for, communicating between a plurality of semiconductor devices, comprising: at least two semiconductor devices; a plurality of high speed signal lines connected between the at least two semiconductor devices; a plurality of digital serial links connected between the at least two semiconductor devices and the high speed signal lines; said plurality of digital serial links sending and receiving parallel digital information over the plurality of high speed signal lines when in a parallel mode; and said plurality of digital serial links sending and receiving serial digital information over the plurality of high speed signal lines when in a serial mode.
Claim 4
Independent Claim
102 words
A system for, communicating between a plurality of semiconductor devices, comprising: at least two semiconductor devices; a plurality of high speed signal lines connected between the at least two semiconductor devices; a plurality of digital serial links connected between the at least two semiconductor devices and the high speed signal lines; said plurality of digital serial links sending and receiving parallel digital information over the plurality of high speed signal lines when in a parallel mode; and said plurality of digital serial links sending and receiving serial digital information over the plurality of high speed signal lines when in a serial mode.
Claim 5
Dependent Claim
17 words
The system of claim 2, wherein said plurality of digital serial links include a plurality of encoders.
Claim 6
Dependent Claim
17 words
The system of claim 2, wherein said plurality of digital serial links include a plurality of decoders.
Claim 7
Dependent Claim
17 words
The system of claim 2, wherein said plurality of digital serial links include a synchronous communications protocol.
Claim 8
Dependent Claim
17 words
The system of claim 2, wherein said plurality of digital serial links include an asynchronous communications protocol.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-02-02 | 2001-08-04 | 2002-02-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-02-02 | 2005-08-04 | 2006-02-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-02-02 | 2009-08-04 | 2010-02-03 | $7700.00 | Window Closed / Lapsed |