US5707889A
Expired / Lapsed
US
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Process for forming field isolation
Assignee: Motorola Solutions Inc
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Filing: 1996-05-13
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Granted: 1998-01-13
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Expires: 2016-05-13
Abstract
Abstract An annealed amorphous silicon layer is formed prior to forming field isolation regions when using in a LOCOS field isolation process. The annealed amorphous silicon layer helps to reduce encroachment compared to conventional LOCOS field isolation process and helps to reduce the likelihood of forming pits within a substrate compared to a PBL field isolation process. The annealed amorphous silicon layer may be used in forming field isolation regions that defines the active regions between transistors including MOSFETs and bipolar transistors. Doped silicon or a silicon-rich silicon nitride layer may be used in place of conventional materials. The anneal of the amorphous silicon layer may be performed after forming a silicon nitride layer if the silicon nitride layer is deposited at a temperature no higher than 600 degrees Celsius.
Inventors
- 👤 Ting Chen Hsu
- 👤 Laureen H. Parker
- 👤 David G. Kolar
- 👤 Philip J. Tobin
- 👤 Hsing-Huang Tseng
- 👤 Lisa K. Garling
- 👤 Vida Ilderem
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 13:44
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/61
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
117 words
A process for forming field isolation comprising the steps of: forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; annealing the amorphous silicon layer; forming a silicon-rich silicon nitride layer over the amorphous silicon layer; patterning the silicon-rich silicon nitride layer to form a patterned silicon-rich silicon nil-ride layer including an opening and a silicon-rich silicon nitride member; thermally oxidizing the substrate underlying the opening to form a field isolation region within the opening; and removing the silicon-rich silicon nitride member, wherein the step of annealing is performed in a separate step from the step of forming the silicon-rich silicon nitride layer and before the step of thermally oxidizing.
Claim 2
Dependent Claim
117 words
A process for forming field isolation comprising the steps of: forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; annealing the amorphous silicon layer; forming a silicon-rich silicon nitride layer over the amorphous silicon layer; patterning the silicon-rich silicon nitride layer to form a patterned silicon-rich silicon nil-ride layer including an opening and a silicon-rich silicon nitride member; thermally oxidizing the substrate underlying the opening to form a field isolation region within the opening; and removing the silicon-rich silicon nitride member, wherein the step of annealing is performed in a separate step from the step of forming the silicon-rich silicon nitride layer and before the step of thermally oxidizing.
Claim 3
Dependent Claim
34 words
The process of claim 1, wherein the step of forming the silicon-rich silicon nitride layer is performed such that the silicon-rich silicon nitride layer has a refractive index in a range of about 2.02-2.50.
Claim 4
Dependent Claim
33 words
The process of claim 1, wherein the step of forming the silicon-rich silicon nitride layer is performed such that the silicon-rich silicon nitride layer has a silicon concentration no higher than 50 percent.
Claim 5
Dependent Claim
34 words
The process of claim 1, wherein the step of forming the silicon-rich silicon nitride layer is performed such that the silicon-rich silicon nitride layer has a refractive index in a range of about 2.02-2.2.
Claim 6
Dependent Claim
33 words
The process of claim 1, wherein the step of forming the silicon-rich silicon nitride layer is performed such that the silicon-rich silicon nitride layer has a silicon concentration no higher than 20 percent.
Claim 7
Dependent Claim
25 words
The process of claim 1, further comprising a step of removing any remaining portion of the amorphous silicon layer after the step of thermally oxidizing.
Claim 8
Dependent Claim
47 words
The process of claim 1, wherein: the silicon-rich silicon nitride layer is formed to a thickness in a range of about 1000-2500 angstroms; and the pad layer is formed to a thickness no greater than about 40 percent of the thickness of the silicon-rich silicon nitride layer.
Claim 9
Dependent Claim
38 words
The process of claim 1, wherein the step of annealing comprises a step of annealing the amorphous silicon layer in a furnace at a temperature in a range of about 300-620 degrees Celsius for at least twenty minutes.
Claim 10
Dependent Claim
40 words
The process of claim 1, wherein the step of annealing comprises a step of annealing the amorphous silicon layer in a rapid thermal processor at a temperature in a range of about 300-800 degrees Celsius for at least five seconds.
Claim 11
Dependent Claim
48 words
The process of claim 1, wherein the step of annealing comprises a step of annealing the amorphous silicon layer between the steps of forming the silicon-rich silicon nitride layer and thermally oxidizing, wherein the step of annealing is performed at a temperature no higher than 620 degrees Celsius.
Claim 12
Dependent Claim
26 words
The process of claim 1, wherein the step of forming the silicon-rich silicon nitride layer is performed at a temperature no greater than 600 degrees Celsius.
Claim 13
Dependent Claim
34 words
The process of claim 1, wherein the step of forming the silicon-rich silicon nitride layer is performed using low pressure chemical vapor deposition at a temperature in a range of about 700-800 degrees Celsius.
Claim 14
Dependent Claim
20 words
The process of claim 1, wherein the step of forming the silicon-rich silicon nitride layer is performed by plasma deposition.
Claim 15
Dependent Claim
60 words
The process of claim 1, wherein the step of annealing comprises a first portion and a second portion, wherein: the first portion is performed in a furnace at a temperature in a range of about 300-620 degrees Celsius; and the second portion is performed in a rapid thermal processor at a temperature in a range of about 300-800 degrees Celsius.
Claim 16
Dependent Claim
42 words
The process of claim 1, further comprising a step of forming a first bipolar transistor and a second bipolar transistor after the step of thermally oxidizing, wherein the field isolation region lies adjacent to and between the first and second bipolar transistors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-01-12 | 2001-07-14 | 2002-01-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-01-12 | 2005-07-14 | 2006-01-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-01-12 | 2009-07-14 | 2010-01-13 | $7700.00 | Window Closed / Lapsed |