Graphic processing apparatus and method

Claim 1

A graphic processing apparatus comprising: a processor for executing an operation process; a display for displaying pixel data; a memory for storing, in an integrated manner, at least a program necessary for operation of said processor and a plurality of said pixel data produced by said processor; a display controller having a first display buffer and a second display buffer, each for buffering at least a raster portion of said pixel data stored in said memory, said display controller alternately using during subsequent display cycles, one of said first display buffer and said second display buffer as a write buffer for writing a next pixel data thereto from said memory, while using an opposite one of said first display buffer and said second display buffer as a read buffer for reading a current pixel data therefrom to said display; a comparator for comparing a time required to read a remaining said next pixel data from said memory into said write buffer with a remaining operation time required to display a remaining content of said read buffer; and a priority control means for controlling memory access priority based on a comparison made in said comparator, said priority control means generating a priority control signal indicating a first memory access priority value for high priority accessing of said display controller to said memory when a time required to read said next pixel data remaining in said memory means approaches said remaining operation time required to display said remaining content in said read buffer, and otherwise generating another priority control signal indicating a second memory access priority value for normal priority accessing of said display controller to said common memory.