← Back to Patent Explorer
US5696406A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device and method for fabricating the same

Assignee: NEC Corp
•
Filing: 1994-10-03
•
Granted: 1997-12-09
•
Expires: 2014-10-03
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A first groove for an upper interconnection and a second groove for a bonding pad are formed on a silicon dioxide film including a lower interconnection, and a through-hole is formed to connect the first groove to the lower interconnection. At the same time with the formation of the through-hole, the second groove is deepened by the common etching process. Then, an Al film is formed on the silicon dioxide film, and the Al film is polished to be removed except for the Al film in the first and second grooves to provide the upper interconnection and the bonding pad.

Inventors

  • 👤 Hisashi Ueno

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 14:45
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/201; H10D86/01; H10W; H10W72/00; H10W72/01; H10W72/019; H10W72/90; H10W72/921; H10W72/923; H10W72/951; H10W72/952

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 114 words
A semiconductor device, comprising: a semiconductor substrate; an insulating film provided on said semiconductor substrate; an upper interconnection formed in said insulating film; and a bonding pad formed in said insulating film; said upper interconnection being connected via a through-hole to a lower interconnection; and said bonding pad having a thickness to provide a bonding pad lower surface that extends below a horizontal level of a top surface of said lower interconnection; and said bonding pad having a dimple on a top surface thereof, and having a thickness greater than a depth of said dimple, and a bottom surface level of said dimple being lower than a top surface level of said upper interconnection.
Claim 2
Dependent Claim 114 words
A semiconductor device, comprising: a semiconductor substrate; an insulating film provided on said semiconductor substrate; an upper interconnection formed in said insulating film; and a bonding pad formed in said insulating film; said upper interconnection being connected via a through-hole to a lower interconnection; and said bonding pad having a thickness to provide a bonding pad lower surface that extends below a horizontal level of a top surface of said lower interconnection; and said bonding pad having a dimple on a top surface thereof, and having a thickness greater than a depth of said dimple, and a bottom surface level of said dimple being lower than a top surface level of said upper interconnection.
Claim 3
Dependent Claim 28 words
A semiconductor device, according to claim 1, wherein: said bonding paid has a top surface area which is greater than a top surface area of said upper interconnection.

References Cited (Backward Citations)

JPS6178151A Cited
US5223084A Cited
JPH0629471A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-12-08 2001-06-09 2001-12-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-12-08 2005-06-09 2005-12-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-12-08 2009-06-09 2009-12-09 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag