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Patent US5694333A successfully refreshed from Google Patents.
US5694333A
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System and method for performing more efficient window context switching in an instrumentation system
Assignee: National Instruments Corp
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Filing: 1995-04-19
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Granted: 1997-12-02
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Expires: 2015-04-19
Abstract
Abstract A system and method for performing more efficient hardware context switches in a computer-controlled instrumentation system including a computer system which controls a plurality of instruments. The instrumentation system includes a direct memory access transfer device which performs various data transfers between the computer system and the various instruments. The system also includes a plurality of processes executing in the computer system which operates through a common window to map cycles onto the instrumentation bus to the various instruments. Each process or thread executing on the CPU requires a specific context, and the DMA transfer device automatically configures itself to different contexts in parallel with operating system context changes. Each process includes corresponding context information stored in memory. When the operating system is invoked to switch in a new process on the CPU, the operating system writes the address of the context information to the DMA transfer device. The DMA transfer device reads the context from memory and automatically configures itself in parallel with context changes performed by the operating system.
Inventors
- 👤 Hugo Andrade
- 👤 Brian Keith Odom
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 22:43
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/461; G06F9/463; G06F13/00; G06F13/14; G06F13/20; G06F13/28; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/319; G01R31/31903; G01R31/31907
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
200 words
A method for performing context switches in an instrumentation system comprising a CPU, a memory coupled to the CPU, a plurality of instruments, and a direct memory access transfer device coupled to the memory and the plurality of instruments, wherein a plurality of processes execute on the CPU to perform operations on the plurality of instruments, the method comprising the steps of: storing a first context in the memory at a first address; providing said first address of said first context to the direct memory access transfer device, wherein said first context corresponds to a first process and wherein said first process requires the direct memory access transfer device to have said first context when said first process is executing on the CPU; the direct memory access transfer device receiving said first address; the direct memory access transfer device reading said first context from the memory using said first address; the direct memory access transfer device configuring itself according to said first context after said step of reading said first context from the memory; and said first process beginning execution on the CPU after said step of the direct memory access transfer device configuring itself according to said first context.
Claim 2
Independent Claim
200 words
A method for performing context switches in an instrumentation system comprising a CPU, a memory coupled to the CPU, a plurality of instruments, and a direct memory access transfer device coupled to the memory and the plurality of instruments, wherein a plurality of processes execute on the CPU to perform operations on the plurality of instruments, the method comprising the steps of: storing a first context in the memory at a first address; providing said first address of said first context to the direct memory access transfer device, wherein said first context corresponds to a first process and wherein said first process requires the direct memory access transfer device to have said first context when said first process is executing on the CPU; the direct memory access transfer device receiving said first address; the direct memory access transfer device reading said first context from the memory using said first address; the direct memory access transfer device configuring itself according to said first context after said step of reading said first context from the memory; and said first process beginning execution on the CPU after said step of the direct memory access transfer device configuring itself according to said first context.
Claim 3
Dependent Claim
52 words
The method of claim 1, wherein said instrumentation system includes a computer system, and wherein said computer system includes said CPU and said memory, the method further comprising: the computer system performing context switching operations during at least a portion of said step of the direct memory access transfer device configuring itself.
Claim 4
Dependent Claim
47 words
The method of claim 2, wherein an operating system executes in the CPU to control operations of said computer system, the method further comprising: the operating system performing context switching operations in said instrumentation system during said step of the direct memory access transfer device configuring itself.
Claim 5
Dependent Claim
31 words
The method of claim 3, further comprising: invoking the operating system to switch in execution of said first process on the CPU prior to said step of providing said first address.
Claim 6
Dependent Claim
56 words
The method of claim 3, wherein a second process is executing on the CPU prior to said step of the operating system performing context switching operations, wherein said second process has a second context, the method further comprising: saving said second context of said second process prior to said step of said first process beginning execution.
Claim 7
Dependent Claim
80 words
The method of claim 3, further comprising: the direct memory access transfer device notifying the operating system that the direct memory access transfer device has completed said step of configuring itself according to said first context after said step of configuring; and the operating system switching in execution of said first process on the CPU in response to receiving said notification from the direct memory access transfer device that the direct memory access device has completed said step of configuring.
Claim 8
Dependent Claim
163 words
The method of claim 3, further comprising: storing a second context for a second process in the memory at a second address; invoking the operating system to switch in execution of said second process on the CPU after said step of the first process beginning execution; providing said second address of said second context to said direct memory access transfer device, wherein said second process requires the direct memory access transfer device to have said second context when said second process is executing on the CPU; the direct memory access transfer device receiving said second address; the direct memory access transfer device reading said second context from the memory using said second address; the direct memory access transfer device configuring itself according to said second context after said step of reading said second context from the memory; and said second process beginning execution on the CPU after said step of the direct memory access transfer device configuring itself according to said second context.
Claim 9
Dependent Claim
35 words
The method of claim 7, further comprising the operating system performing context switching operations in said instrumentation system during said step of the direct memory access transfer device configuring itself according to said second context.
Claim 10
Dependent Claim
48 words
The method of claim 1, wherein the instrumentation system further comprises an instrumentation bus coupled to said CPU, wherein said plurality of instruments are coupled to the instrumentation bus; wherein said first context comprises one or more parameters for mapping cycles from said CPU to the instrumentation bus.
Claim 11
Dependent Claim
22 words
The method of claim 9, wherein said first context includes a target address space of an instrument coupled to the instrumentation bus.
Claim 12
Dependent Claim
22 words
The method of claim 10, wherein said first context further includes a status of a last transfer performed by said first process.
Claim 13
Dependent Claim
39 words
The method of claim 1, wherein said steps of the direct memory access transfer device reading said first context from the memory using said first address and configuring itself according to said first context do not require CPU involvement.
Claim 14
Dependent Claim
201 words
An instrumentation system which performs more efficient context switching operations, comprising: an instrumentation bus; a plurality of instruments coupled to said instrumentation bus which perform desired tests and measurements, a CPU which executes a plurality of processes for communicating with said plurality of instruments, wherein said CPU generates cycles which propagate to said instrumentation bus to communicate with said instruments in response to respective processes executing on said CPU; a memory coupled to said CPU which stores a plurality of context data corresponding to said plurality of processes; a direct memory access transfer device coupled to said CPU, said memory, said instrumentation bus, and said plurality of instruments; wherein when a new process is to be switched in for execution on said CPU, said CPU notifies said direct memory access transfer device of said new process; wherein the direct memory access transfer device includes context switching logic which reads one of said plurality of contexts from said memory corresponding to said new process and configures the direct memory access transfer device according to said one of said plurality of contexts corresponding to said new process in response to said CPU notifying said direct memory access transfer device of said new process.
Claim 15
Dependent Claim
201 words
An instrumentation system which performs more efficient context switching operations, comprising: an instrumentation bus; a plurality of instruments coupled to said instrumentation bus which perform desired tests and measurements, a CPU which executes a plurality of processes for communicating with said plurality of instruments, wherein said CPU generates cycles which propagate to said instrumentation bus to communicate with said instruments in response to respective processes executing on said CPU; a memory coupled to said CPU which stores a plurality of context data corresponding to said plurality of processes; a direct memory access transfer device coupled to said CPU, said memory, said instrumentation bus, and said plurality of instruments; wherein when a new process is to be switched in for execution on said CPU, said CPU notifies said direct memory access transfer device of said new process; wherein the direct memory access transfer device includes context switching logic which reads one of said plurality of contexts from said memory corresponding to said new process and configures the direct memory access transfer device according to said one of said plurality of contexts corresponding to said new process in response to said CPU notifying said direct memory access transfer device of said new process.
Claim 16
Dependent Claim
52 words
The instrumentation system of claim 13, wherein an operating system executes on said CPU when the new process is to be switched in for execution on said CPU; wherein said operating system invokes a context switch handler on said CPU which notifies said direct memory access transfer device of said new process.
Claim 17
Dependent Claim
27 words
The instrumentation system of claim 14, wherein said context switch handler provides a first address corresponding to first context data to said direct memory access transfer device.
Claim 18
Dependent Claim
43 words
The instrumentation system of claim 15, wherein said operating system executing on said CPU performs context change operations while said context switching logic in the direct memory access transfer device configures the direct memory access transfer device according to said first context data.
Claim 19
Dependent Claim
47 words
The instrumentation system of claim 15, wherein said context switching logic in the direct memory access transfer device reads said first context data from the memory using said first address and configures the direct memory access transfer device according to said first context data without CPU involvement.
Claim 20
Dependent Claim
52 words
The method of claim 1, wherein the direct memory access transfer device includes a plurality of registers which store data indicating a context, wherein the direct memory access transfer device configuring itself according to said first context comprises the direct memory access transfer device programming its registers according to said first context.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-12-01 | 2001-06-02 | 2001-12-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-12-01 | 2005-06-02 | 2005-12-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-12-01 | 2009-06-02 | 2009-12-02 | $7700.00 | Window Closed / Lapsed |