US5689455A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for programming antifuse bits
Assignee: Micron Technology Inc
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Filing: 1995-08-31
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Granted: 1997-11-18
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Expires: 2015-08-31
Abstract
Abstract Circuitry for programming antifuse elements is provided which permits all antifuse elements in a bank to be programmed simultaneously, thereby enhancing the speed at which antifuse elements may be programmed. In one embodiment, a feedback circuit is associated with each antifuse element to stop the flow of current through the antifuse element once it is programmed. In another embodiment, circuitry is provided for generating a separate programming pulse for each antifuse element, which is selected for programming.
Inventors
- 👤 Patrick J. Mullarkey
- 👤 Casey R. Kurth
- 👤 Jason Graalum
- 👤 Daryl L. Habersetzer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 18:49
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/18
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
122 words
An integrated circuit memory product comprising: at least one bank containing a plurality of antifuse elements in which top plates of the antifuse elements are joined in a common connection to a programming voltage; a plurality of selection transistors, with each one of said selection transistors connected in series with one of said antifuse elements in the bank, the enablement of a particular one of said selection transistors resulting in a path being provided for the programming of the antifuse element to which the enabled selection transistor is connected; and a feedback circuit associated with each antifuse element in the bank to stop the flow of current through the antifuse element with which it is associated once that antifuse element is programmed.
Claim 2
Dependent Claim
122 words
An integrated circuit memory product comprising: at least one bank containing a plurality of antifuse elements in which top plates of the antifuse elements are joined in a common connection to a programming voltage; a plurality of selection transistors, with each one of said selection transistors connected in series with one of said antifuse elements in the bank, the enablement of a particular one of said selection transistors resulting in a path being provided for the programming of the antifuse element to which the enabled selection transistor is connected; and a feedback circuit associated with each antifuse element in the bank to stop the flow of current through the antifuse element with which it is associated once that antifuse element is programmed.
Claim 3
Dependent Claim
25 words
The apparatus of claim 1 further comprising circuitry for verifying that antifuse elements have been programmed correctly and that unprogrammed antifuse elements are functioning properly.
Claim 4
Dependent Claim
73 words
The apparatus of claim 2, wherein the verification circuitry includes: circuitry for connecting the antifuse element in series with a node; circuitry including a transistor that is sufficient to charge the voltage at the node from a first voltage to a second voltage; and circuitry for detecting whether (a) the node is charged to the second voltage or (b) has remained at the first voltage which indicates that an unprogrammed antifuse is leaky.
Claim 5
Dependent Claim
81 words
The apparatus of claim 2, wherein the verification circuitry includes: circuitry for connecting the antifuse element in series with a node; circuitry including a parallel combination of a first transistor and a second transistor that is sufficient to charge the node from a first voltage to a second voltage; and circuitry for detecting whether (a) the node is charged to the second voltage or (b) the node remains at the first voltage thereby indicating that the antifuse element is programmed properly.
Claim 6
Dependent Claim
74 words
An integrated circuit memory product comprising: a plurality of banks of antifuse elements, each bank including a plurality of antifuse elements; circuitry for selecting one of the banks of antifuse elements for programming; circuitry for providing a separate programming pulse to each of the antifuse elements in the selected bank that is to be programmed and; circuitry for verifying that antifuse elements have been programmed correctly and that unprogrammed antifuse elements are functioning properly.
Claim 7
Dependent Claim
74 words
An integrated circuit memory product comprising: a plurality of banks of antifuse elements, each bank including a plurality of antifuse elements; circuitry for selecting one of the banks of antifuse elements for programming; circuitry for providing a separate programming pulse to each of the antifuse elements in the selected bank that is to be programmed and; circuitry for verifying that antifuse elements have been programmed correctly and that unprogrammed antifuse elements are functioning properly.
Claim 8
Dependent Claim
73 words
The apparatus of claim 5, wherein the verification circuitry includes: circuitry for connecting the antifuse element in series with a node; circuitry including a transistor that is sufficient to charge the voltage at the node from a first voltage to a second voltage; and circuitry for detecting whether (a) the node is charged to the second voltage; or (b) has remained at the first voltage which indicates that an unprogrammed antifuse is leaky.
Claim 9
Dependent Claim
76 words
The apparatus of claim 5, wherein the verification circuitry includes: circuitry for connecting the antifuse element in series with a node; circuitry including a parallel combination of a first transistor that is sufficient to charge the node from a first voltage to a second voltage; and circuitry for detecting whether (a) the node is charged to the second voltage or (b) has remained at the first voltage thereby indicating that the antifuse element is programmed properly.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-11-17 | 2001-05-19 | 2001-11-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-11-17 | 2005-05-19 | 2005-11-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-11-17 | 2009-05-19 | 2009-11-18 | $7700.00 | Window Closed / Lapsed |