US5683932A
Expired / Lapsed
US
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Method of fabricating a planarized trench and field oxide isolation structure
Assignee: National Semiconductor Corp
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Filing: 1995-08-18
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Granted: 1997-11-04
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Expires: 2015-08-18
Abstract
Abstract An isolation method for separating active regions in a semiconductor substrate by combining field oxide formation with trench isolation is disclosed. Deep trenches are etched in a silicon substrate. An oxide layer is deposited over the entire substrate such that the oxide layer also fills the trenches that have been etched. A layer of polysilicon is deposited over the wafer and etched back to form polysilicon spacers. These polysilicon spacers are used to align a photoresist mask that is used to etch the oxide overlying the active regions of the substrate, thereby resulting in fully planarized isolation regions with fully walled active regions.
Inventors
- 👤 Rashid Bashir
- 👤 Francois Hebert
- 👤 Datong Chen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 02:18
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0143; H10W10/0145; H10W10/10; H10W10/17; Y; Y10; Y10S; Y10S438/00; Y10S438/97
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
288 words
A method of fabricating electrically isolated active regions in a silicon substrate by combining field oxide and trench isolation techniques, the method comprising: forming a pad oxide layer on a surface of the substrate; forming a nitride layer on the pad oxide layer; forming an etch-stop polysilicon layer on the nitride layer; selectively etching the etch-stop polysilicon layer, the nitride layer and the pad oxide layer to expose spaced-apart non-active surface regions of the silicon substrate, the non-active surface regions defining the active regions therebetween; etching the non-active surface regions of the silicon substrate to form first trenches having a first depth in the silicon substrate; forming a mask oxide layer over the structure resulting from the foregoing steps and patterning the mask oxide layer to expose bottom surface regions of selected ones of the first trenches; etching the bottom surface regions to form second trenches having a second depth that is deeper than the first depth in the silicon substrate; removing the mask oxide layer; forming a sidewall oxide layer on exposed bottom and sidewall surfaces of the first trenches and the second trenches; forming an isolation oxide layer over the structure resulting from the foregoing steps; forming polysilicon spacers on the isolation oxide layer adjacent to edges of the active regions; forming an oxide etch mask on the structure resulting from the foregoing steps, the oxide etch mask having openings therein over the active regions to expose the isolation oxide layer over the active regions, edges of the openings being formed on the polysilicon spacers; removing the isolation oxide layer from the active regions using the oxide etch mask as a mask; removing the etch-stop polysilicon layer; and removing the polysilicon spacers and the nitride layer.
Claim 2
Independent Claim
288 words
A method of fabricating electrically isolated active regions in a silicon substrate by combining field oxide and trench isolation techniques, the method comprising: forming a pad oxide layer on a surface of the substrate; forming a nitride layer on the pad oxide layer; forming an etch-stop polysilicon layer on the nitride layer; selectively etching the etch-stop polysilicon layer, the nitride layer and the pad oxide layer to expose spaced-apart non-active surface regions of the silicon substrate, the non-active surface regions defining the active regions therebetween; etching the non-active surface regions of the silicon substrate to form first trenches having a first depth in the silicon substrate; forming a mask oxide layer over the structure resulting from the foregoing steps and patterning the mask oxide layer to expose bottom surface regions of selected ones of the first trenches; etching the bottom surface regions to form second trenches having a second depth that is deeper than the first depth in the silicon substrate; removing the mask oxide layer; forming a sidewall oxide layer on exposed bottom and sidewall surfaces of the first trenches and the second trenches; forming an isolation oxide layer over the structure resulting from the foregoing steps; forming polysilicon spacers on the isolation oxide layer adjacent to edges of the active regions; forming an oxide etch mask on the structure resulting from the foregoing steps, the oxide etch mask having openings therein over the active regions to expose the isolation oxide layer over the active regions, edges of the openings being formed on the polysilicon spacers; removing the isolation oxide layer from the active regions using the oxide etch mask as a mask; removing the etch-stop polysilicon layer; and removing the polysilicon spacers and the nitride layer.
Claim 3
Dependent Claim
49 words
A method as in claim 1 wherein the step of removing the isolation oxide layer comprises: etching a portion of the thickness of the isolation oxide layer utilizing a first etch chemistry; and etching the remainder of the thickness of the isolation oxide layer utilizing a second etch chemistry.
Claim 4
Dependent Claim
59 words
A method as in claim 1 wherein the step of removing the isolation oxide layer comprises: etching a portion of the thickness of the isolation oxide layer utilizing a first etch chemistry that is non-selective to polysilicon; and etching the remainder of the thickness of the isolation oxide layer utilizing a second etch chemistry that is selective to polysilicon.
Claim 5
Dependent Claim
64 words
A method as in claim 1 wherein the step of removing the isolation oxide layer comprises: etching a portion of the thickness of the isolation oxide layer utilizing a first etch chemistry that includes a C 2 F 6 :SF 6 mixture; and etching the remainder of the thickness of the isolation oxide layer utilizing a second etch chemistry that is selective to polysilicon.
Claim 6
Dependent Claim
20 words
A method as in claim 4 wherein the second etch chemistry includes a CHF 3 :C 2 F 6 mixture.
Claim 7
Dependent Claim
16 words
A method as in claim 1 wherein the mask oxide layer is low temperature oxide (LTO).
Claim 8
Dependent Claim
31 words
A method as in claim 1 and wherein the mask oxide layer is conformed deposited oxide selected from the group consisting of plasma enhanced TEOS (PETEOS), TEOS/OZONE and thermal TEOS oxide.
Claim 9
Dependent Claim
25 words
A method as in claim 1 wherein the nitride layer is about 1000 Angstroms thick and the etch-step polysilicon layer is about 3000 Angstroms thick.
Claim 10
Dependent Claim
19 words
A method as in claim 1 wherein the etch-stop polysilicon layer is removed by etching with SF 6 .
Claim 11
Independent Claim
270 words
A method of fabricating electrically isolated active regions in a silicon substrate by combining field oxide and trench isolation techniques, the method comprising; forming a pad oxide layer on a surface of the substrate; forming a nitride layer on the pad oxide layer; selectively etching the nitride layer and the pad oxide layer to expose spaced-apart non-active surface regions of the silicon substrate, the non-active surface regions defining the active regions therebetween; etching the non-active surface regions of the silicon substrate to form first trenches having a first depth in the silicon substrate; forming a mask oxide layer over the structure resulting from the foregoing steps and patterning the mask oxide layer to expose bottom surface regions of selected ones of the first trenches; etching the bottom surface regions to form second trenches having a second depth that is greater than the first depth in the silicon substrate; removing the mask oxide layer; forming a sidewall oxide layer on exposed bottom and sidewall surfaces of the first trenches and the second trenches; forming an isolation oxide layer over the structure resulting from the foregoing steps; forming polysilicon spacers on the isolation oxide layer adjacent to edges of the active regions; forming an oxide etch mask on the structure resulting from the foregoing steps, the oxide etch mask having openings therein over the active regions to expose the isolation oxide layer over the active regions, edges of the openings being formed on the polysilicon spacers; removing the isolation oxide layer from the active regions using the oxide etch mask as a mask; and removing the polysilicon spacers and the nitride layer.
Claim 12
Independent Claim
270 words
A method of fabricating electrically isolated active regions in a silicon substrate by combining field oxide and trench isolation techniques, the method comprising; forming a pad oxide layer on a surface of the substrate; forming a nitride layer on the pad oxide layer; selectively etching the nitride layer and the pad oxide layer to expose spaced-apart non-active surface regions of the silicon substrate, the non-active surface regions defining the active regions therebetween; etching the non-active surface regions of the silicon substrate to form first trenches having a first depth in the silicon substrate; forming a mask oxide layer over the structure resulting from the foregoing steps and patterning the mask oxide layer to expose bottom surface regions of selected ones of the first trenches; etching the bottom surface regions to form second trenches having a second depth that is greater than the first depth in the silicon substrate; removing the mask oxide layer; forming a sidewall oxide layer on exposed bottom and sidewall surfaces of the first trenches and the second trenches; forming an isolation oxide layer over the structure resulting from the foregoing steps; forming polysilicon spacers on the isolation oxide layer adjacent to edges of the active regions; forming an oxide etch mask on the structure resulting from the foregoing steps, the oxide etch mask having openings therein over the active regions to expose the isolation oxide layer over the active regions, edges of the openings being formed on the polysilicon spacers; removing the isolation oxide layer from the active regions using the oxide etch mask as a mask; and removing the polysilicon spacers and the nitride layer.
Claim 13
Independent Claim
31 words
A method as in claim, 10 and wherein the mask oxide layer is conformed deposited oxide selected from the group consisting of plasma enhanced TEOS (PETEOS), TEOS/OZONE and thermal TEOS oxide.
Claim 14
Dependent Claim
15 words
A method as in claim 10 wherein the nitride layer is about 1000-3000 Angstroms thick.
References Cited (Backward Citations)
JPS57204133A
Cited
US4472240A
Cited
JPS59177940A
Cited
JPS6367747A
Cited
EP0424608A1
Cited
US5385861A
Cited
US5411913A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-11-03 | 2001-05-05 | 2001-11-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-11-03 | 2005-05-05 | 2005-11-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-11-03 | 2009-05-05 | 2009-11-04 | $7700.00 | Window Closed / Lapsed |