Patent US5680301A successfully refreshed from Google Patents.
US5680301A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Series/parallel resonant converter
Assignee: Eaton Power Quality Corp
•
Filing: 1992-09-02
•
Granted: 1997-10-21
•
Expires: 2012-09-02
Abstract
Abstract A series/parallel resonant converter includes a resonant control circuit 1 that outputs a pair of alternately high gate drive signals G 1 , G 2 ; switches in the form of isolated gate bipolar transistors (IGBTs) Q 1 , Q 2 ; diodes D 1 , D 2 ; a pair of resonant capacitors C R ; a series resonant inductor L RS ; a load 2; a zero current detector 4; a bus 6, 6'; and a parallel resonant inductor L RP in parallel with the load. The input line current and voltage are converted into an alternating current I LOAD and voltage V LOAD for driving the load 2. The load 2 may include a transformer T 1 , half bridge rectifier, capacitor, and PWM inverter.
Inventors
- 👤 George W. Oughton, Jr.
- 👤 Steven Widener
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 16:57
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/53; H02M7/537; H02M7/538; H02M3/00; H02M3/01; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/33569; H02M3/33571; Y; Y02; Y02B; Y02B70/00; Y02B70/10; Y02P; Y02P80/00; Y02P80/10
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
272 words
An electrical circuit for converting a DC bus voltage into an AC current for driving a load, comprising: (a) first and second transistors (Q 1 , Q 2 ) connected in series such that a collector of the first transistor is connected to a first side of the bus and an emitter of the second transistor is connected to a second side of the bus; (b) a first diode (D 1 ) connected between an emitter and the collector of the first transistor and a second diode (D 2 ) connected between the emitter and a collector of the second transistor; (c) first and second resonant capacitors (C R ) connected in series such that a first terminal of the first capacitor is connected to the first side of the bus and a second terminal of the second capacitor is connected to the second side of the bus; (d) a series resonant inductor (L RS ) comprising a first terminal connected to a node between the first and second resonant capacitors and a second terminal adapted to be connected to a first side of the load; (e) a parallel resonant inductor (L RP ) comprising a first terminal connected to the second terminal of the series resonant inductor and a second terminal connected to a node between the first and second transistors and adapted to be connected to a second side of the load; and (f) control circuit means for generating first and second gate drive signals (G 1 , G 2 ) for alternately driving the first and second transistors such that an alternating load current (I LOAD ) is provided.
Claim 2
Dependent Claim
272 words
An electrical circuit for converting a DC bus voltage into an AC current for driving a load, comprising: (a) first and second transistors (Q 1 , Q 2 ) connected in series such that a collector of the first transistor is connected to a first side of the bus and an emitter of the second transistor is connected to a second side of the bus; (b) a first diode (D 1 ) connected between an emitter and the collector of the first transistor and a second diode (D 2 ) connected between the emitter and a collector of the second transistor; (c) first and second resonant capacitors (C R ) connected in series such that a first terminal of the first capacitor is connected to the first side of the bus and a second terminal of the second capacitor is connected to the second side of the bus; (d) a series resonant inductor (L RS ) comprising a first terminal connected to a node between the first and second resonant capacitors and a second terminal adapted to be connected to a first side of the load; (e) a parallel resonant inductor (L RP ) comprising a first terminal connected to the second terminal of the series resonant inductor and a second terminal connected to a node between the first and second transistors and adapted to be connected to a second side of the load; and (f) control circuit means for generating first and second gate drive signals (G 1 , G 2 ) for alternately driving the first and second transistors such that an alternating load current (I LOAD ) is provided.
Claim 3
Dependent Claim
84 words
The electrical circuit recited in claim 1, further comprising zero current crossing means for detecting when a current (I R ) in the series resonant inductor is zero and controlling the generation of the first and second gate drive signals such that the first gate drive signal is set low when the current is zero and the second gate drive signal is set high following a controlled dead time delay (τ D ) from the time the first gate drive signal was set low.
Claim 4
Dependent Claim
279 words
A series/parallel resonant converter for converting a first DC bus voltage of a first magnitude to a second DC voltage of a second magnitude, comprising: (a) first and second switches coupled in series such that the first switch is electrically coupled to a first side of the bus and the second switch is electrically coupled to a second side of the bus; (b) a first diode coupled in parallel with the first switch and a second diode coupled in parallel with the second switch; (c) first and second resonant capacitors connected in series such that a first terminal of the first capacitor is connected to the first side of the bus and a second terminal of the second capacitor is connected to the second side of the bus; (d) a series resonant inductor comprising a first terminal connected to a node between the first and second resonant capacitors and a second terminal; (e) a parallel resonant inductor comprising a first terminal connected to the second terminal of the series resonant inductor and a second terminal connected to a node between the first and second switches; (f) a transformer comprising a secondary winding and a primary winding, said primary winding comprising a first terminal coupled to the second terminal of the series resonant inductor and a second terminal coupled to the second terminal of the parallel resonant inductor; (g) a rectifier coupled to the secondary winding; and (h) control circuit means for generating first and second gate drive signals (G 1 , G 2 ) for alternately driving the first and second switches such that an alternating current (I LOAD ) is provided to the primary winding of the transformer.
Claim 5
Dependent Claim
279 words
A series/parallel resonant converter for converting a first DC bus voltage of a first magnitude to a second DC voltage of a second magnitude, comprising: (a) first and second switches coupled in series such that the first switch is electrically coupled to a first side of the bus and the second switch is electrically coupled to a second side of the bus; (b) a first diode coupled in parallel with the first switch and a second diode coupled in parallel with the second switch; (c) first and second resonant capacitors connected in series such that a first terminal of the first capacitor is connected to the first side of the bus and a second terminal of the second capacitor is connected to the second side of the bus; (d) a series resonant inductor comprising a first terminal connected to a node between the first and second resonant capacitors and a second terminal; (e) a parallel resonant inductor comprising a first terminal connected to the second terminal of the series resonant inductor and a second terminal connected to a node between the first and second switches; (f) a transformer comprising a secondary winding and a primary winding, said primary winding comprising a first terminal coupled to the second terminal of the series resonant inductor and a second terminal coupled to the second terminal of the parallel resonant inductor; (g) a rectifier coupled to the secondary winding; and (h) control circuit means for generating first and second gate drive signals (G 1 , G 2 ) for alternately driving the first and second switches such that an alternating current (I LOAD ) is provided to the primary winding of the transformer.
Claim 6
Dependent Claim
85 words
The series/parallel resonant converter recited in claim 3, further comprising zero current crossing means for detecting when a current (I R ) in the series resonant inductor is zero and controlling the generation of the first and second gate drive signals such that the first gate drive signal is set low when the current is zero and the second gate drive signal is set high following a controlled dead time delay (τ D ) from the time the first gate drive signal was set low.
Claim 7
Dependent Claim
25 words
The series/parallel resonant converter recited in claim 4, wherein said first and second switches comprise members of the following group: IGBTs, BJTs, FETs, and MCTs.
References Cited (Backward Citations)
GB937294A
Cited
US3390275A
Cited
US4078247A
Cited
US4124885A
Cited
GB2043370A
Cited
GB2085243A
Cited
US4460949A
Cited
US4477868A
Cited
US4639849A
Cited
US4785387A
Cited
US4691273A
Cited
US4758940A
Cited
US4860184A
Cited
US5001621A
Cited
US4814962A
Cited
US5073849A
Cited
US5014182A
Cited
US5091069A
Cited
US5057698A
Cited
US4992919A
Cited
US5157593A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-10-20 | 2001-04-21 | 2001-10-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-10-20 | 2005-04-21 | 2005-10-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-10-20 | 2009-04-21 | 2009-10-21 | $7700.00 | Window Closed / Lapsed |