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US5679978A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having resin gate hole through substrate for resin encapsulation

Assignee: Kyushu Fujitsu Electronics Ltd
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Filing: 1994-10-24
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Granted: 1997-10-21
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Expires: 2014-10-24
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Abstract

Abstract A semiconductor device includes a substrate having top and bottom surfaces, a semiconductor element mounted on the top surface of the substrate, and a resin package made of a resin and encapsulating the semiconductor element. The substrate includes at least one resin gate hole enabling the resin to be introduced from the bottom surface of the substrate via the resin gate hole when encapsulating the semiconductor element by the resin.

Inventors

  • 👤 Toshimi Kawahara
  • 👤 Shinya Nakaseko
  • 👤 Mitsunada Osawa
  • 👤 Shinichirou Taniguchi
  • 👤 Mayumi Osumi
  • 👤 Hiroyuki Ishiguro
  • 👤 Yoshitugu Katoh
  • 👤 Junichi Kasai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 18:12
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/01; H10W74/019; H10W76/00; H10W76/10; H10W76/12; H10P; H10P72/00; H10P72/70; H10P72/74; H10W42/00; H10W42/20; H10W42/261; H10W42/276; H10W70/00; H10W70/099; H10W74/016; H10W74/10; H10W74/111; H10W74/114; H10W74/117; H10W76/40; H10W76/42; H10W76/47; H10W90/00; H10W90/701; H10W70/60; H10W70/67; H10W70/68; H10W70/681; H10W72/00; H10W72/01; H10W72/012; H10W72/01204; H10W72/071; H10W72/072; H10W72/07251; H10W72/075; H10W72/07551; H10W72/07554; H10W72/20; H10W72/50; H10W72/541; H10W72/547; H10W72/851; H10W72/874; H10W72/884; H10W74/131; H10W74/142; H10W90/731; H10W90/734; H10W90/751; H10W90/754; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49146; Y10T29/49169; Y10T29/49171

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 96 words
A semiconductor device comprising: a substrate having top and bottom surfaces; a semiconductor element mounted on the top surface of said substrate; a resin package made of a resin and encapsulating said semiconductor element, said substrate including at least one resin gate hole enabling said resin to be introduced from the bottom surface of said substrate via the resin gate hole when encapsulating said semiconductor element by said resin; and a frame body surrounding a periphery of said resin package, a thickness of said frame body and a thickness of said resin being approximately the same.
Claim 2
Dependent Claim 96 words
A semiconductor device comprising: a substrate having top and bottom surfaces; a semiconductor element mounted on the top surface of said substrate; a resin package made of a resin and encapsulating said semiconductor element, said substrate including at least one resin gate hole enabling said resin to be introduced from the bottom surface of said substrate via the resin gate hole when encapsulating said semiconductor element by said resin; and a frame body surrounding a periphery of said resin package, a thickness of said frame body and a thickness of said resin being approximately the same.
Claim 3
Dependent Claim 29 words
The semiconductor device as claimed in claim 1, wherein said resin package fills a recess to which said resin gate hole opens on the bottom surface of said substrate.
Claim 4
Dependent Claim 16 words
The semiconductor device as claimed in claim 1, wherein said resin includes no mold release agent.
Claim 5
Dependent Claim 51 words
The semiconductor device as claimed in claim 1, which further comprises: a wiring layer provided on said substrate; connecting means for electrically connecting said semiconductor element and said wiring layer; and external connecting terminals provided on said wiring layer and used for electrically connecting the semiconductor device to an external element.
Claim 6
Dependent Claim 23 words
The semiconductor device as claimed in claim 4, wherein said connecting means includes wires electrically connecting said semiconductor element and said wiring layer.
Claim 7
Dependent Claim 23 words
The semiconductor device as claimed in claim 4, wherein said connecting means includes bumps electrically connecting said semiconductor element and said wiring layer.
Claim 8
Dependent Claim 17 words
The semiconductor device as claimed in claim 4, wherein said external connecting terminals include a lead member.
Claim 9
Dependent Claim 15 words
The semiconductor device as claimed in claim 4, wherein said external connecting terminals include bumps.
Claim 10
Dependent Claim 19 words
The semiconductor device as claimed in claim 4, wherein said external connecting terminals on said wiring layer include vias.
Claim 11
Dependent Claim 19 words
The semiconductor device as claimed in claim 4, wherein said wiring layer is made up of a multi-level circuit.
Claim 12
Dependent Claim 36 words
The semiconductor device as claimed in claim 10, wherein said multi-level circuit includes a stacked structure having wiping layers and insulator layers which are alternately stacked, and mechanical compressions making electrical connections among the wiring layers.
Claim 13
Dependent Claim 18 words
The semiconductor device as claimed in claim 1, wherein said substrate includes a plurality of resin gate holes.
Claim 14
Dependent Claim 107 words
The semiconductor device comprising; a substrate having top and bottom surfaces; a semiconductor element mounted on the top surface of said substrate; a resin package made of a resin and encapsulating said semiconductor element, said substrate including at least one resin gate hole enabling said resin to be introduced from the bottom surface of said substrate via the resin gate hole when encapsulating said semiconductor element by said resin; and a lid member arranged above said resin package and including a plurality of through holes, said through holes providing a passage for moisture included within the resin of said resin package to escape outside said resin package.
Claim 15
Dependent Claim 107 words
The semiconductor device comprising; a substrate having top and bottom surfaces; a semiconductor element mounted on the top surface of said substrate; a resin package made of a resin and encapsulating said semiconductor element, said substrate including at least one resin gate hole enabling said resin to be introduced from the bottom surface of said substrate via the resin gate hole when encapsulating said semiconductor element by said resin; and a lid member arranged above said resin package and including a plurality of through holes, said through holes providing a passage for moisture included within the resin of said resin package to escape outside said resin package.
Claim 16
Dependent Claim 86 words
The semiconductor device as claimed in claim 13, wherein said lid member is made of a material having a high thermal conductivity, said material being selected from a group consisting of (i) copper, aluminum, tungsten, molybdenum, clad materials of such metals, alloys of such metals and mixtures of such metals respectively having a thermal conductivity of 20 W/mk or greater, (ii) silicon nitride, aluminum nitride, alumina and composite materials of such ceramics, (iii) diamond, and (iv) composite materials of a plurality of metals, ceramics and diamond.
Claim 17
Dependent Claim 137 words
A semiconductor device comprising: a circuit; a semiconductor element having a top surface and mounted on said circuit; a frame body provided on said circuit and surrounding said semiconductor element in a state where a gap is formed between said semiconductor element and said frame body; and a resin package made of a resin filled on an inner side of said frame body and encapsulating said semiconductor element, a thickness of said resin and a thickness of said frame body being substantially the same, said frame body including a resin gate hole which opens at a surface other than a surface confronting the top surface of said semiconductor element and enabling said resin to be introduced on the inner side of said frame body via the resin gate hole when encapsulating said semiconductor element by said resin.
Claim 18
Dependent Claim 137 words
A semiconductor device comprising: a circuit; a semiconductor element having a top surface and mounted on said circuit; a frame body provided on said circuit and surrounding said semiconductor element in a state where a gap is formed between said semiconductor element and said frame body; and a resin package made of a resin filled on an inner side of said frame body and encapsulating said semiconductor element, a thickness of said resin and a thickness of said frame body being substantially the same, said frame body including a resin gate hole which opens at a surface other than a surface confronting the top surface of said semiconductor element and enabling said resin to be introduced on the inner side of said frame body via the resin gate hole when encapsulating said semiconductor element by said resin.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-10-20 2001-04-21 2001-10-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-10-20 2005-04-21 2005-10-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-10-20 2009-04-21 2009-10-21 $7700.00 Window Closed / Lapsed

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