Ring oscillator having a substantially sinusoidal signal

Claim 2

A ring oscillator comprising an odd number of inverters connected in a ring, and means for driving the ring oscillator so that it oscillates at a frequency slightly less than its maximum oscillating frequency such that harmonics of said oscillating frequency are suppressed, means for balancing waveforms of a signal passing around the ring of inverters whereby positive and negative excursions thereof are substantially identical, in which the inverters are comprised of a pair of CMOS FETs, said FETs having a predetermined width ratio therebetween whereby said balancing is achieved.

Claim 3

A ring oscillator as defined in claim 1 in which said balancing means is comprised of means for controlling current in at least one of said inverters.

Claim 4

A ring oscillator as defined in claim 1 in which said balancing means is comprised of means for controlling the gain of at least one of said inverters.

Claim 5

A ring oscillator as defined in claim 1 including means for controlling slopes of rising and falling edges of said signal passing around the ring of inverters to be substantially mirror images of each other.

Claim 6

A ring oscillator as defined in claim 1 in which said signal passing around the ring of inverters is substantially sinusoidal in shape.

Claim 7

A ring oscillator as defined in claim 1 in which said ratio is between about 2.3 and about 2.6, and in which a ratio scale between successive inverter stages is about 1.26.

Claim 8

A ring oscillator as defined in claim 1 formed entirely of CMOS elements, comprising a plurality of CMOS inverters formed in a ring, means for controlling current passing through at least a first CMOS inverter in the ring, means for controlling voltage swing of rising and falling edges of a signal passing around the ring to be substantially equal about an operating point with variation of control current.

Claim 9

A ring oscillator as defined in claim 7 in which each of the CMOS inverters is comprised of a source-drain circuit of a PMOS FET connected in series with a source-drain circuit of an NMOS FET, the source of each PMOS FET being connected to a positive voltage rail, the means for controlling current being comprised of NMOS FETs having their source-drain circuits in series with a current supply to the inverters.

Claim 10

A ring oscillator as defined in claim 7, including means for controlling slopes of rising and falling edges of a signal passing around the ring to be substantially equal in magnitude and opposite in sign, with variation of control current.

Claim 11

A ring oscillator as defined in claim 9 in which said means for controlling current and said means for controlling slopes are comprised of plural control circuits, each control circuit being comprised of a pair of FETs having sources and gates connected in parallel, the sources being connected to a voltage rail and the gates being connected to a source of control voltage, the drain of one of the pair of FETs being connected via an FET configured as a diode to the drain of the other of the pair of FETs, means for connecting the drain of the other of the pair of FETs of respective control circuits to the source of an FET of a corresponding CMOS inverter.

Claim 12

A ring oscillator as defined in claim 10 in which said voltage rail is ground.

Claim 13

A ring oscillator as defined in claim 10 including a CMOS buffer connected between an output of the ring oscillator and an output conductor.

Claim 14

A ring oscillator as defined in claim 11 in which each of the CMOS inverters is comprised of a source-drain circuit of a PMOS FET connected in series with a source-drain circuit of an NMOS FET, the source of each PMOS FET being connected to a positive voltage rail, the FETs of the control circuits being comprised of NMOS FETs, the source of each NMOS FET being connected to the drain of an NMOS FET of a corresponding control circuit.

Claim 15

A ring oscillator as defined in claim 10 in which the number of CMOS inverters is three.

Claim 16

A ring oscillator comprising an odd number of inverters connected in a ring, and means for driving the ring oscillator so that it oscillates at a frequency sligthly less than its maximum oscillating frequency such that harmonics of said oscillating frequency are suppressed, said ring oscillator being formed entirely of CMOS elements, said ring being formed of more than two inverters connected in series, an output of the series of inverters being connected to an input of the series of inverters, each inverter being comprised of a PMOS field effect transistor having its source-drain circuit in series with an NMOS FET, means for connecting a source of each of the PMOS FETs to a voltage rail and the source of each of the NMOS FETs other than a first NMOS FET in the series of inverters to ground, the source of the first NMOS FET being connected via a source-drain circuit of a control NMOS FET to ground, and means for applying a control voltage to a gate of the control NMOS FET.

Claim 17

A ring oscillator comprising an odd number of inverters connected in a ring, and means for driving the ring oscillator so that it oscillates at a frequency sligthly less than its maximum oscillating frequency such that harmonics of said oscillating frequency are suppressed, said ring oscillator being formed entirely of CMOS elements, said ring being formed of more than two inverters connected in series, an output of the series of inverters being connected to an input of the series of inverters, each inverter being comprised of a PMOS field effect transistor having its source-drain circuit in series with an NMOS FET, means for connecting a source of each of the PMOS FETs to a voltage rail and the source of each of the NMOS FETs other than a first NMOS FET in the series of inverters to ground, the source of the first NMOS FET being connected via a source-drain circuit of a control NMOS FET to ground, and means for applying a control voltage to a gate of the control NMOS FET.

Claim 18

A ring oscillator as defined in claim 15 further comprising an output buffer formed of a CMOS inverter having an input connected to the output of the series of inverters, for providing an output signal at a junction of a PMOS and NMOS FET of the output buffer.

Claim 19

A pair of ring oscillators each as defined in claim 15, further including means for cross-coupling the outputs of an even number of corresponding pairs of CMOS inverters of each ring, and means for obtaining respective output signals from the outputs of each of the series of inverters.

Claim 20

A pair of ring oscillators as defined in claim 17, further comprising a pair of buffers having their inputs connected to the outputs of respective ones of the series of inverters.

Claim 21

A ring oscillator comprising an odd number of inverters connected in a ring, and means for driving the ring oscillator so that it oscillates at a frequency slightly less than its maximum oscillating frequency such that harmonics of such oscillating frequency are suppressed, said ring oscillator being formed entirely of CMOS elements, comprising two rings of similar numbers of CMOS inverters, each ring having an odd number of CMOS inverters in excess of two, means connecting an output of each ring to an input of the same ring, means for cross-coupling the outputs of an even number of corresponding ones of the inverters of each ring via cross-coupling inverters, and means for controlling current flow via a control voltage in a last CMOS inverter of each ring feeding an output terminal.

Claim 22

A ring oscillator comprising an odd number of inverters connected in a ring, and means for driving the ring oscillator so that it oscillates at a frequency slightly less than its maximum oscillating frequency such that harmonics of such oscillating frequency are suppressed, said ring oscillator being formed entirely of CMOS elements, comprising two rings of similar numbers of CMOS inverters, each ring having an odd number of CMOS inverters in excess of two, means connecting an output of each ring to an input of the same ring, means for cross-coupling the outputs of an even number of corresponding ones of the inverters of each ring via cross-coupling inverters, and means for controlling current flow via a control voltage in a last CMOS inverter of each ring feeding an output terminal.

Claim 23

A ring oscillator as defined in claim 19 in which the means for controlling current flow is comprised of a pair of FETs having sources and gates connected in parallel, the sources being connected to a voltage rail and the gates being connected to a source of control voltage, the drain of one of the pair of FETs being connected via an FET configured as a diode to the drain of the other of the pair of FETs, and means for connecting the drain of the other of the pair of FETs to the sources of the last CMOS inverters.

Claim 24

A ring oscillator as defined in claim 19 in which the means for controlling current flow is comprised of a pair of control circuits, each control circuit being comprised of a pair of FETs having sources and gates connected in parallel, the sources being connected to a voltage rail and the gates being connected to a source of control voltage, the drain of one of the pair of FETs being connected via an FET configured as a diode to the drain of the other of the pair of FETs, means for connecting the drain of the other of the pair of FETs of respective control circuits to the source of an FET of a corresponding last CMOS inverter in the ring feeding an output terminal.

Claim 25

A ring oscillator as defined in claim 21 further comprising a pair of buffers having their inputs connected to the outputs of respective ones of said last CMOS inverters.

Claim 26

A ring oscillator as defined in claim 20 in which the number of CMOS inverters in each ring is three.