US5677207A
Expired / Lapsed
US
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Method for fabricating a thin film transistor using silicide layer
Assignee: LG Display Co Ltd
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Filing: 1996-03-05
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Granted: 1997-10-14
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Expires: 2016-03-05
Abstract
Abstract A method for forming a thin film transistor includes the steps of depositing a semiconductor layer on a substrate and patterning the semiconductor layer to form an active region, forming a gate insulation layer on the active layer and the substrate, forming a gate conductive layer on the gate insulation layer, forming a metal layer on the gate conductive layer and the gate insulation layer, forming a silicide layer by reacting the gate conductive layer with the metal layer, removing an unreacted portion of the metal layer, forming a high-density impurity region in the active layer by ion-implantation using the silicide layer as a mask, forming a gate electrode by removing the silicide layer, and forming an interlayer insulation layer on the exposed surface of the gate electrode and gate insulation layer.
Inventors
- 👤 Yong Min Ha
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 23:44
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01326; H10D30/6704; H10D30/6713; H10D30/6715
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
167 words
A method for forming a thin film transistor comprising the steps of: (a) depositing a semiconductor layer on a substrate and patterning the semiconductor layer to form an active layer; (b) forming a gate insulation layer on the active layer and the substrate; (c) forming a gate conductive layer on the gate insulation layer; (d) forming a metal layer on the gate conductive layer and the gate insulation layer; (e) forming a silicide layer by reacting the gate conductive layer with the metal layer; (f) removing an unreacted portion of the metal layer; (g) forming a high-dose impurity region in the active layer by ion-implantation using the silicide layer as a mask; (h) forming a gate electrode by removing the silicide layer; (I) forming a low-dose impurity region in the active layer by ion-implanting through the gate insulation layer using the gate electrode as a mask, after step (h); (j) forming an interlayer insulation layer on the exposed surface of the gate electrode and gate insulation layer.
Claim 2
Independent Claim
167 words
A method for forming a thin film transistor comprising the steps of: (a) depositing a semiconductor layer on a substrate and patterning the semiconductor layer to form an active layer; (b) forming a gate insulation layer on the active layer and the substrate; (c) forming a gate conductive layer on the gate insulation layer; (d) forming a metal layer on the gate conductive layer and the gate insulation layer; (e) forming a silicide layer by reacting the gate conductive layer with the metal layer; (f) removing an unreacted portion of the metal layer; (g) forming a high-dose impurity region in the active layer by ion-implantation using the silicide layer as a mask; (h) forming a gate electrode by removing the silicide layer; (I) forming a low-dose impurity region in the active layer by ion-implanting through the gate insulation layer using the gate electrode as a mask, after step (h); (j) forming an interlayer insulation layer on the exposed surface of the gate electrode and gate insulation layer.
Claim 3
Independent Claim
144 words
A method of forming a thin film transistor comprising the steps of: (a) depositing a semiconductor layer on a substrate and patterning the semiconductor layer to form an active layer; (b) forming a gate insulation layer on the active layer and the substrate; (c) forming a gate conductive layer on the gate insulation layer; (d) forming a silicide layer on upper and side surfaces of the gate conductive layer; (e) forming a high-dose impurity region on the active layer by ion-implantation using the silicide layer as a mask; (f) removing the silicide layer so that a gate electrode is exposed; (g) forming a low-dose impurity region in the active layer by ion-implanting through the gate insulation layer using the gate electrode as a mask, after step (f); (h) forming an interlayer insulator on an exposed surface of the gate electrode and gate insulation layer.
Claim 4
Independent Claim
144 words
A method of forming a thin film transistor comprising the steps of: (a) depositing a semiconductor layer on a substrate and patterning the semiconductor layer to form an active layer; (b) forming a gate insulation layer on the active layer and the substrate; (c) forming a gate conductive layer on the gate insulation layer; (d) forming a silicide layer on upper and side surfaces of the gate conductive layer; (e) forming a high-dose impurity region on the active layer by ion-implantation using the silicide layer as a mask; (f) removing the silicide layer so that a gate electrode is exposed; (g) forming a low-dose impurity region in the active layer by ion-implanting through the gate insulation layer using the gate electrode as a mask, after step (f); (h) forming an interlayer insulator on an exposed surface of the gate electrode and gate insulation layer.
Claim 5
Dependent Claim
21 words
The method for forming a thin film transistor according to claim 1, wherein the silicide layer is formed during a heat-treatment.
Claim 6
Dependent Claim
24 words
The method for forming a thin film transistor according to claim 1, wherein the gate conductive layer is formed larger than the gate electrode.
Claim 7
Dependent Claim
41 words
The method for forming a thin film transistor according to claim 4, wherein the step of forming the gate conductive layer includes the steps of forming a doped polysilicon layer on the gate insulation layer, and patterning the doped polysilicon layer.
Claim 8
Dependent Claim
41 words
The method for forming a thin film transistor according to claim 1, wherein the step of forming the gate conductive layer includes the steps of forming a doped polysilicon layer on the gate insulation layer, and patterning the doped polysilicon layer.
Claim 9
Dependent Claim
26 words
The method for forming a thin film transistor according to claim 3, wherein the heat treatment uses a furnace at temperatures of 600° C. or less.
Claim 10
Dependent Claim
36 words
The method for forming a thin film transistor according to claim 1, wherein in the step of forming the silicide layer, a heat treatment is performed using a furnace at temperatures of 600° C. or less.
Claim 11
Independent Claim
21 words
The method for forming a thin film transistor according to clam 3, wherein the heat treatment is performed using a laser.
Claim 12
Independent Claim
21 words
The method for forming a thin film transistor according to clam 3, wherein the heat treatment is performed using a laser.
Claim 13
Dependent Claim
29 words
The method for forming a thin film transistor according to claim 4, Wherein in the step of forming the silicide layer, a heat treatment is performed using a laser.
Claim 14
Dependent Claim
20 words
The method for forming a thin film transistor according to claim 1, wherein the semiconductor layer is formed of polysilicon.
Claim 15
Dependent Claim
49 words
The method for forming a thin film transistor according to claim 2, wherein the gate conductive layer of step (c) is formed larger than the gate electrode, and a silicide layer of step (d) is formed by reacting substantially only the gate conductive layer with a metal source gas.
Claim 16
Dependent Claim
32 words
The method for forming a thin film transistor according to claim 2, wherein the silicide layer of step (d) is formed by supplying a metal source gas with a silicon source gas.
Claim 17
Dependent Claim
48 words
The method for forming a thin film transistor according to claim 2, wherein the step of forming a gate conductive layer includes the steps of: forming an undoped polysilicon layer on the gate insulation layer; patterning the undoped polysilicon layer; and ion-implanting dopants in the undoped polysilicon layer.
Claim 18
Dependent Claim
48 words
The method for forming a thin film transistor according to claim 12, wherein the step of forming the gate conductive layer includes the steps of: forming an undoped polysilicon layer on the gate insulation layer; patterning the undoped polysilicon layer; and ion-implanting dopants in the undoped polysilicon layer.
Claim 19
Dependent Claim
41 words
The method for forming a thin film transistor according to claim 12, wherein the step of forming the gate conductive layer includes the steps of forming a doped polysilicon layer on the gate insulation layer, and patterning the doped polysilicon layer.
Claim 20
Dependent Claim
41 words
The method for forming a thin film transistor according to claim 12, wherein the step of forming the gate conductive layer includes the Steps of forming a doped polysilicon layer on the gate insulation layer, and patterning the doped polysilicon layer.
Claim 21
Dependent Claim
20 words
The method for forming a thin film transistor according to claim 12, wherein the semiconductor layer is formed of polysilicon.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2000-10-13 | 2001-04-14 | 2001-10-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-10-13 | 2005-04-14 | 2005-10-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-10-13 | 2009-04-14 | 2009-10-14 | $7700.00 | Window Closed / Lapsed |