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US5674782A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for efficiently removing by-products produced in dry-etching

Assignee: Samsung Electronics Co Ltd
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Filing: 1996-03-04
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Granted: 1997-10-07
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Expires: 2016-03-04
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Abstract

Abstract A method for efficiently removing by-products produced in dry-etching a fabricated structure of a semiconductor device, particularly, a polycide structure. The method includes the steps of sequentially forming a polysilicon layer and a refractory metal silicide layer to overlie previously fabricated structures on a semiconductor substrate, dry-etching the polysilicon layer and the refractory metal silicide layer to form a patterned polysilicon layer and a patterned refractory metal silicide layer, and thermal treating the resultant structure to remove at least one kind of by-product produced in the dry-etching step at a temperature higher than the boiling point of any by-product.

Inventors

  • 👤 Nae-in Lee
  • 👤 Moon-han Park
  • 👤 Young-wug Kim
  • 👤 Kwan-young Oh

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 14:25
CPC Classifications
H; H10; H10P; H10P70/00; H10P70/20; H10P70/27; H10P70/273; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/01312; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 136 words
A method for manufacturing a semiconductor device comprising the steps of: forming a polysilicon layer to overlie previously fabricated structures on a semiconductor substrate; depositing a refractory metal silicide layer on said polysilicon layer; sequentially dry-etching said polysilicon layer and said refractory metal silicide layer to form a patterned polysilicon layer and a patterned refractory metal silicide layer, using an etching gas comprising fluoride and chloride for dry etching said refractory metal silicide layer and using an etching gas comprising at least one of Cl 2 , HBr, He--O 2 and mixtures thereof for dry etching said polysilicon layer; and thermal treating said patterned polysilicon layer and said patterned refractory metal silicide layer at a temperature higher than 350° C. in a nitrogen atmosphere, to remove at least one by-product produced during said sequential dry-etching steps.
Claim 2
Independent Claim 136 words
A method for manufacturing a semiconductor device comprising the steps of: forming a polysilicon layer to overlie previously fabricated structures on a semiconductor substrate; depositing a refractory metal silicide layer on said polysilicon layer; sequentially dry-etching said polysilicon layer and said refractory metal silicide layer to form a patterned polysilicon layer and a patterned refractory metal silicide layer, using an etching gas comprising fluoride and chloride for dry etching said refractory metal silicide layer and using an etching gas comprising at least one of Cl 2 , HBr, He--O 2 and mixtures thereof for dry etching said polysilicon layer; and thermal treating said patterned polysilicon layer and said patterned refractory metal silicide layer at a temperature higher than 350° C. in a nitrogen atmosphere, to remove at least one by-product produced during said sequential dry-etching steps.
Claim 3
Dependent Claim 25 words
The method of claim 1, said thermal treating being performed at a boiling point temperature, higher than 350° C., of said at least one by-product.
Claim 4
Dependent Claim 12 words
The method of claim 1, said thermal treating constituting rapid thermal annealing.
Claim 5
Dependent Claim 11 words
The method of claim 1, said thermal treating constituting vacuum annealing.
Claim 6
Dependent Claim 36 words
The method of claim 1, said refractory metal silicide layer comprising at least one layer selected from the group consisting of WSi x , TiSi x , MoSi x , TaSi x and CoSi x .
Claim 7
Independent Claim 191 words
A method for manufacturing a semiconductor device comprising the steps of: forming a polysilicon layer to overlie previously fabricated structures on a semiconductor substrate; depositing a WSi 2 layer on said polysilicon layer; forming an oxide layer to overlie said WSi 2 layer; etching said oxide layer to form a patterned high temperature oxide layer; sequentially dry-etching said WSi 2 layer and said polysilicon layer to form a patterned WSi 2 layer and a patterned polysilicon layer, said dry-etching utilizing said oxide layer as an etching mask, dry-etching of said WSi 2 layer using an etching gas comprising at least one selected from the group consisting of SF 6 , Cl 2 and a mixture thereof, and said dry etching of said polysilicon layer using an etching gas comprising at least one selected from the group consisting of Cl 2 , HBr, He--O 2 and a mixture thereof; and thermal treating said patterned WSi 2 layer and said patterned polysilicon layer, to remove by-products produced in said sequential dry-etching steps, in a nitrogen atmosphere at a temperature higher than 350° C. and the boiling point of any one of said by-products.
Claim 8
Independent Claim 191 words
A method for manufacturing a semiconductor device comprising the steps of: forming a polysilicon layer to overlie previously fabricated structures on a semiconductor substrate; depositing a WSi 2 layer on said polysilicon layer; forming an oxide layer to overlie said WSi 2 layer; etching said oxide layer to form a patterned high temperature oxide layer; sequentially dry-etching said WSi 2 layer and said polysilicon layer to form a patterned WSi 2 layer and a patterned polysilicon layer, said dry-etching utilizing said oxide layer as an etching mask, dry-etching of said WSi 2 layer using an etching gas comprising at least one selected from the group consisting of SF 6 , Cl 2 and a mixture thereof, and said dry etching of said polysilicon layer using an etching gas comprising at least one selected from the group consisting of Cl 2 , HBr, He--O 2 and a mixture thereof; and thermal treating said patterned WSi 2 layer and said patterned polysilicon layer, to remove by-products produced in said sequential dry-etching steps, in a nitrogen atmosphere at a temperature higher than 350° C. and the boiling point of any one of said by-products.
Claim 9
Dependent Claim 12 words
The method of claim 6, said thermal treating constituting rapid thermal treating.
Claim 10
Dependent Claim 11 words
The method of claim 6, said thermal treating constituting vacuum annealing.
Claim 11
Dependent Claim 17 words
The method of claim 7, said rapid thermal treating temperature being between 500° C. and 800° C.
Claim 12
Dependent Claim 17 words
The method of claim 7, said rapid thermal treating being performed for about ten to thirty seconds.
Claim 13
Dependent Claim 16 words
The method of claim 8, said vacuum annealing temperature being between 500° C. and 700° C.
Claim 14
Dependent Claim 16 words
The method of claim 8, said vacuum annealing being performed for about one to five minutes.
Claim 15
Independent Claim 174 words
A method for manufacturing a semiconductor device comprising the steps of: sequentially forming a gate oxide layer, a polysilicon layer, a WSi 2 layer and a first oxide layer; etching said first oxide layer to form a patterned first oxide layer; sequentially dry-etching said WSi 2 layer and said polysilicon layer to expose said gate oxide layer and to form a patterned WSi 2 layer and a patterned polysilicon layer, said dry-etching using said patterned first oxide as an etching mask, said dry etching of said WSi 2 layer using an etching gas comprising SF 6 and Cl 2 ; thermal treating said patterned WSi 2 layer and said patterned polysilicon layer, in a nitrogen atmosphere at a temperature higher than 350° C., to remove at least one by-product produced during said sequential dry-etching steps; and forming a second oxide layer, and thereafter, anisotropically etching said second oxide layer, to form an oxide spacer on a side surface of said patterned first oxide layer, said patterned WSi 2 layer and said patterned polysilicon layer.
Claim 16
Independent Claim 174 words
A method for manufacturing a semiconductor device comprising the steps of: sequentially forming a gate oxide layer, a polysilicon layer, a WSi 2 layer and a first oxide layer; etching said first oxide layer to form a patterned first oxide layer; sequentially dry-etching said WSi 2 layer and said polysilicon layer to expose said gate oxide layer and to form a patterned WSi 2 layer and a patterned polysilicon layer, said dry-etching using said patterned first oxide as an etching mask, said dry etching of said WSi 2 layer using an etching gas comprising SF 6 and Cl 2 ; thermal treating said patterned WSi 2 layer and said patterned polysilicon layer, in a nitrogen atmosphere at a temperature higher than 350° C., to remove at least one by-product produced during said sequential dry-etching steps; and forming a second oxide layer, and thereafter, anisotropically etching said second oxide layer, to form an oxide spacer on a side surface of said patterned first oxide layer, said patterned WSi 2 layer and said patterned polysilicon layer.
Claim 17
Dependent Claim 15 words
The method of claim 1, said nitrogen atmosphere is being formed of N 2 gas.
Claim 18
Dependent Claim 15 words
The method of claim 6, said nitrogen atmosphere is being formed by N 2 gas.
Claim 19
Dependent Claim 15 words
The method of claim 13, said nitrogen atmosphere is being formed by N 2 gas.

References Cited (Backward Citations)

US4478678A Cited
US5110408A Cited
US5110411A Cited
US5200028A Cited
US5391244A Cited
US5378653A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-10-06 2001-04-07 2001-10-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-10-06 2005-04-07 2005-10-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-10-06 2009-04-07 2009-10-07 $7700.00 Window Closed / Lapsed

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