One-chip semiconductor integrated circuit device capable of outputting analog color signal or digital color signal

Claim 2

A color palette semiconductor integrated circuit device on a semiconductor substrate used to provide red, green and blue analog color signals to an analog color display, and for use with a frame memory, the device comprising: first to third digital to analog converters each having inputs and an output; a first external analog terminal coupled to the output of the first digital to analog converter; a second external analog terminal coupled to the output of the second digital to analog converter; a third external analog terminal coupled to the output of the third digital to analog converter; external address input terminals to which address data are to be supplied from the frame memory; a memory circuit coupled to the external address input terminals and accessed by the address data, the memory circuit having memory capacity of a predetermined number of words defined by the number of the address data, each word defining color of one pixel to be displayed on a screen of the analog color display and containing first digital data of a plurality of bits for red color, second digital data of a plurality of bits for green color, and third digital data of a plurality of bits for blue color; external data terminals, which are greater in number than the number of the external address input terminals, and to which digital color data are to be supplied from outside of the color palette semiconductor integrated circuit device; a selector having first inputs coupled to outputs of the memory circuit to receive the first to third digital data, respectively, second inputs coupled to the external data terminals and first outputs coupled to the inputs of the first to third digital to analog converters, respectively; and, a control circuit coupled to the selector and responsive to mode control data and controlling an operation of the selector so as to bring the selector into a first mode or a second mode, where the first mode enables the selector to couple the first inputs thereof to the first outputs thereof, and is defined as a mode where the number of colors, corresponding to the number of the words in the memory circuit, are displayed simultaneously on the screen of the analog color display, and where the second mode enables the selector to couple the second inputs thereof to the first outputs thereof, and is defined as a mode where the number of colors corresponding to the nth power are displayed simultaneously on the screen of the analog color display, where n is the number of the external data terminals; wherein, in the first mode, the memory circuit is accessed by address data supplied thereto in synchronization with a display timing and supplies the first to third digital data included in one word corresponding to the supplied address data to the inputs of the first to third digital to analog converters, respectively, via the selector so that the first to third digital to analog converters convert the first to third digital data into red, green and blue analog color signals, respectively, and provide the converted red, green and blue analog color signals to the first to third external analog terminals, respectively, and wherein, in the second mode, the first to third digital to analog converters receive at the inputs thereof the digital color data via the selector so that the first to third digital to analog converters convert the digital color data into red, green and blue analog color signals, respectively, and provide the converted red, green and blue analog color signals to the first to third external analog terminals, respectively.

Claim 3

A color palette semiconductor integrated circuit device according to claim 1, wherein the external data terminals are coupled to a color liquid crystal display; wherein the selector having second outputs coupled to the external data terminals, such that the external data terminals enable the color liquid crystal display to display a gradation based on the first to third digital data supplied via the second outputs, and wherein the control circuit responsive to the mode control data controlling an operation of the selector so as to bring the selector into a third mode, such that the third mode enables the selector to couple the first inputs thereof to the external data terminals via the second outputs thereof.

Claim 4

A color palette semiconductor integrated circuit device according to claim 2, wherein the first to third digital to analog converters are put into a non-operation state when the control circuit indicates the third mode by the mode control data.

Claim 5

A color palette semiconductor integrated circuit device according to claim 2, wherein, in the third mode, the first to third digital to analog converters is provided a current for operating thereof by a control signal supplied from the control circuit.

Claim 6

A color palette semiconductor integrated circuit device according to claim 2, wherein the memory circuit includes a decoder which is coupled to the external address input terminals and receives the address data output from the frame memory and selects one word corresponding thereto in the first mode.

Claim 7

A color palette semiconductor integrated circuit device according to claim 5, further comprising: means coupled to the memory circuit for changing the first to third digital data contained in a selected word to new data.

Claim 8

A color palette semiconductor integrated circuit device on a semiconductor substrate used to provide red, green and blue analog color signals to an analog color display, and for use with a first or a second frame memory, the device comprising: first to third digital to analog converters each having inputs and an output; a first external analog terminal coupled to the output of the first digital to analog converter; a second external analog terminal coupled to the output of the second digital to analog converter; a third external analog terminal coupled to the output of the third digital to analog converter; external address input terminals to which address data are to be supplied from the first frame memory; a memory circuit coupled to the external address input terminals and accessed by the address data, the memory circuit having memory capacity of a predetermined number of words defined by the number of the address data, each word defining color of one pixel to be displayed on a screen of the analog color display and containing first digital data of a plurality of bits for red color, second digital data of a plurality of bits for green color, and third digital data of a plurality of bits for blue color; external data terminals, which are greater in number than the number of the external address input terminals, and to which digital color data are to be supplied from the second frame memory; a selector having first inputs coupled to outputs of the memory circuit to receive the first to third digital data, respectively, second inputs coupled to the external data terminals, first outputs coupled to the inputs of the first to third digital to analog converters, respectively, and second outputs coupled to the external data terminals; and a control circuit coupled to the selector and responsive to mode control data and controlling an operation of the selector so as to bring the selector into a first mode, a second mode or a third mode, where the first mode enables the selector to couple the first inputs thereof to the first outputs thereof, and is defined as a mode where the number of colors, corresponding to the number of the words in the memory circuit, are displayed simultaneously on the screen of the analog color display, where the second mode enables the selector to couple the second inputs thereof to the first outputs thereof, and is defined as a mode where the number of colors corresponding to 2 to the nth power are displayed simultaneously on the screen of the analog color display, where n is the number of the external data terminals, and where the third mode enables the selector to couple the first inputs thereof to the external data terminals via the second outputs thereof; wherein, in the first mode, the memory circuit is accessed by address data supplied thereto in synchronization with a display timing, and supplies the first to third digital data included in one word corresponding to the supplied address data to the inputs of the first to third digital to analog converters, respectively, via the selector so that the first to third digital to analog converters convert the first to third digital data into red, green and blue analog color signals, respectively, and provide the converted red, green and blue analog color signals to the first to third external analog terminals, respectively; wherein, in the second mode, the first to third digital to analog converters receive at the inputs thereof the digital color data via the selector so that the first to third digital to analog converters convert the digital color data into red, green and blue analog color signals, respectively, and provide the converted red, green and blue analog color signals to the first to third external analog terminals, respectively, and wherein, in the third mode, the selector outputs the first to third digital data supplied from the first inputs thereof to the external data terminals via the second outputs thereof.

Claim 9

A color palette semiconductor integrated circuit device on a semiconductor substrate used to provide red, green and blue analog color signals to an analog color display, and for use with a first or a second frame memory, the device comprising: first to third digital to analog converters each having inputs and an output; a first external analog terminal coupled to the output of the first digital to analog converter; a second external analog terminal coupled to the output of the second digital to analog converter; a third external analog terminal coupled to the output of the third digital to analog converter; external address input terminals to which address data are to be supplied from the first frame memory; a memory circuit coupled to the external address input terminals and accessed by the address data, the memory circuit having memory capacity of a predetermined number of words defined by the number of the address data, each word defining color of one pixel to be displayed on a screen of the analog color display and containing first digital data of a plurality of bits for red color, second digital data of a plurality of bits for green color, and third digital data of a plurality of bits for blue color; external data terminals, which are greater in number than the number of the external address input terminals, and to which digital color data are to be supplied from the second frame memory; a selector having first inputs coupled to outputs of the memory circuit to receive the first to third digital data, respectively, second inputs coupled to the external data terminals, first outputs coupled to the inputs of the first to third digital to analog converters, respectively, and second outputs coupled to the external data terminals; and a control circuit coupled to the selector and responsive to mode control data and controlling an operation of the selector so as to bring the selector into a first mode, a second mode or a third mode, where the first mode enables the selector to couple the first inputs thereof to the first outputs thereof, and is defined as a mode where the number of colors, corresponding to the number of the words in the memory circuit, are displayed simultaneously on the screen of the analog color display, where the second mode enables the selector to couple the second inputs thereof to the first outputs thereof, and is defined as a mode where the number of colors corresponding to 2 to the nth power are displayed simultaneously on the screen of the analog color display, where n is the number of the external data terminals, and where the third mode enables the selector to couple the first inputs thereof to the external data terminals via the second outputs thereof; wherein, in the first mode, the memory circuit is accessed by address data supplied thereto in synchronization with a display timing, and supplies the first to third digital data included in one word corresponding to the supplied address data to the inputs of the first to third digital to analog converters, respectively, via the selector so that the first to third digital to analog converters convert the first to third digital data into red, green and blue analog color signals, respectively, and provide the converted red, green and blue analog color signals to the first to third external analog terminals, respectively; wherein, in the second mode, the first to third digital to analog converters receive at the inputs thereof the digital color data via the selector so that the first to third digital to analog converters convert the digital color data into red, green and blue analog color signals, respectively, and provide the converted red, green and blue analog color signals to the first to third external analog terminals, respectively, and wherein, in the third mode, the selector outputs the first to third digital data supplied from the first inputs thereof to the external data terminals via the second outputs thereof.

Claim 10

A color palette semiconductor integrated circuit device according to claim 7, wherein the first to third digital to analog converters are put into a non-operation state when the control circuit indicates the third mode by the mode control data.

Claim 11

A color palette semiconductor integrated circuit device according to claim 7, wherein, in the third mode, the first to third digital to analog converters is provided a current for operating thereof by a control signal supplied from the control circuit.