Patent US5659253A successfully refreshed from Google Patents.
US5659253A
Expired / Lapsed
US
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Temperature compensated radio frequency detector circuit
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1995-05-05
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Granted: 1997-08-19
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Expires: 2015-05-05
Abstract
Abstract An RF detector circuit (28), which may be utilized in an output power control loop (10) for an RF transmitter, includes a bridge circuit (50) including a first arm (52) containing a first diode (D2) which rectifies the RF signal and a second arm (54) which contains a second diode (D3) series-coupled to the first diode (D2), and having an RF bypass capacitor (C4). The second diode (D3) serves as a temperature compensator for the first diode (D2). The outputs of the bridge circuit (50) are connected to the inputs of a differential amplifier circuit (32) which provides a signal for use in the power control loop (10). The detector input signal is derived from the sense output of a directional coupler (22). In a second embodiment the compensating diode (D13) has its cathode coupled to the cathode of the rectifying diode (D12), and the full voltage across the rectifying diode (D12) is applied to the differential amplifier circuit (32).
Inventors
- 👤 Erik B. Busking
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 15:00
CPC Classifications
H; H03; H03L; H03L5/00; H03L5/02; H03D; H03D1/00; H03D1/08; H03D1/10; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3036; H03G3/3042
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
148 words
A detector circuit for detecting an RF input signal, comprising: a bridge circuit having a first node, a second node, a third node and a fourth node; a first diode electrically connected to said first and second nodes, said first diode being adapted to rectify the RF input signal; a second diode electrically connected to said second and third nodes; a first resistor electrically connected to said first and fourth nodes; a second resistor electrically connected to said third and fourth nodes; and a capacitor electrically connected in parallel with said second diode, said first node being arranged to receive the RF voltage, said fourth node being arranged to receive a bias voltage, said second node providing a first output signal to a first input of a differential amplifier circuit and said fourth node providing a second output signal to a second input of a differential amplifier circuit.
Claim 2
Dependent Claim
148 words
A detector circuit for detecting an RF input signal, comprising: a bridge circuit having a first node, a second node, a third node and a fourth node; a first diode electrically connected to said first and second nodes, said first diode being adapted to rectify the RF input signal; a second diode electrically connected to said second and third nodes; a first resistor electrically connected to said first and fourth nodes; a second resistor electrically connected to said third and fourth nodes; and a capacitor electrically connected in parallel with said second diode, said first node being arranged to receive the RF voltage, said fourth node being arranged to receive a bias voltage, said second node providing a first output signal to a first input of a differential amplifier circuit and said fourth node providing a second output signal to a second input of a differential amplifier circuit.
Claim 3
Dependent Claim
25 words
Detector circuitry according to claim 1, wherein said first and second diodes have equal characteristics, and said first and second resistors have equal resistor values.
Claim 4
Dependent Claim
59 words
Detector circuit according to claim 1, wherein said RF input signal is applied from a sense output of a coupling device and in that said bias voltage (VBIAS) is arranged to provide a current through said first diode such that the dynamic impedance of said first diode matches the characteristic impedance of said sense output of said coupling device.
Claim 5
Dependent Claim
156 words
A detector circuit for detecting an RF input signal, comprising: a bridge circuit having a first node, a second node, a third node and a fourth node; a first diode electrically connected to said first and second nodes, said first diode being adapted to rectify the RF input signal; a second diode electrically connected to said second and third nodes; a first resistor electrically connected to said first and fourth nodes; a second resistor electrically connected to said third and fourth nodes; and a capacitor electrically connected in parallel with said second diode, said first node being arranged to receive the RF voltage, said fourth node being arranged to receive a bias voltage, said first node providing a first output signal to a first input of a differential amplifier circuit through a third resistor and said third node providing a second output signal to a second input of a differential amplifier circuit through a fourth resistor.
Claim 6
Dependent Claim
156 words
A detector circuit for detecting an RF input signal, comprising: a bridge circuit having a first node, a second node, a third node and a fourth node; a first diode electrically connected to said first and second nodes, said first diode being adapted to rectify the RF input signal; a second diode electrically connected to said second and third nodes; a first resistor electrically connected to said first and fourth nodes; a second resistor electrically connected to said third and fourth nodes; and a capacitor electrically connected in parallel with said second diode, said first node being arranged to receive the RF voltage, said fourth node being arranged to receive a bias voltage, said first node providing a first output signal to a first input of a differential amplifier circuit through a third resistor and said third node providing a second output signal to a second input of a differential amplifier circuit through a fourth resistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2000-08-18 | 2001-02-17 | 2001-08-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-08-18 | 2005-02-17 | 2005-08-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-08-18 | 2009-02-17 | 2009-08-19 | $7700.00 | Window Closed / Lapsed |