US5657240A
Expired / Lapsed
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Testing and removal of redundancies in VLSI circuits with non-boolean primitives
Assignee: NEC Corp
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Filing: 1995-05-01
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Granted: 1997-08-12
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Expires: 2015-05-01
Abstract
Abstract Techniques for the generation of tests for detecting specified faults in circuits that include non-Boolean components and for identifying these undetectable faults that are logically redundant. The main features are: (1) only one Boolean variable is used to represent the value on a signal and all signals assume only Boolean values during the test generation procedure, (2) function of non-Boolean components is separated into Boolean and non-Boolean states, and energy functions are derived only for the Boolean state, and (3) non-Boolean states are implicitly considered in the energy minimization procedure.
Inventors
- 👤 Srimat T. Chakradhar
- 👤 Steven G. Rothweiler
- 👤 Vishwani D. Agrawal
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:29
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/3183; G01R31/318371
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
73 words
A method for identifying and removing redundancies in VLSI circuits that include non-Boolean components comprising the steps of: using a production test generation algorithm for identifying as undetectable a specific fault; and using a relaxed test generation algorithm in which specific constraints have been relaxed by ignoring the non-Boolean states of the non-Boolean components for determining whether the specified fault is still undetectable in which case the fault is considered to be redundant.
Claim 2
Independent Claim
73 words
A method for identifying and removing redundancies in VLSI circuits that include non-Boolean components comprising the steps of: using a production test generation algorithm for identifying as undetectable a specific fault; and using a relaxed test generation algorithm in which specific constraints have been relaxed by ignoring the non-Boolean states of the non-Boolean components for determining whether the specified fault is still undetectable in which case the fault is considered to be redundant.
Claim 3
Dependent Claim
17 words
The method of claim 1 with the further step of redesigning the circuit to remove the redundancy.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-08-11 | 2001-02-10 | 2001-08-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-08-11 | 2005-02-10 | 2005-08-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-08-11 | 2009-02-10 | 2009-08-12 | $7700.00 | Window Closed / Lapsed |