Digital color control and chroma killer device

Claim 3

The method of claim 1, wherein: the step of multiplying comprises multiplying in parallel all data of a horizontal line of said color signal with said stored coefficient.

Claim 4

A digital method for image or video processing, comprising: a) receiving a video or image signal; b) separating said video or image signal into chrominance and luminance signals; c) normalizing or killing said chrominance signals; and d) developing color signals by combining signals resulting from step (c) with said luminance signals; and wherein said step (c) includes: detecting when said chrominance signal fails to meet a minimum signal value; modifying a stored coefficient by adding a preselected value having a binary value of +1, 0 or -1 to said stored coefficient once each horizontal line period of said color signal according to determined relationships between said chrominance signal and a reference chrominance signal if said chrominance signal meets said minimum signal value, or by adding a binary -1 to said stored coefficient once each horizontal line period of said color signal if said chrominance signal fails to meet said minimum signal value; and multiplying said chrominance signal by said stored coefficient to produce a chrominance output signal by interpreting said stored coefficient as a floating point number such that the stored coefficient is effectively modified by a value much less than 1 each horizontal line period, whereby said method for automatic color control operates as if a step of vertical filtering were included; such that said chrominance signal is killed when said coefficient is reduced to zero and said chrominance signal is automatically controlled when said coefficient is greater than zero.

Claim 5

A digital method for image or video processing, comprising: a) receiving a video or image signal; b) separating said video or image signal into chrominance and luminance signals; c) normalizing or killing said chrominance signals; and d) developing color signals by combining signals resulting from step (c) with said luminance signals; and wherein said step (c) includes: detecting when said chrominance signal fails to meet a minimum signal value; modifying a stored coefficient by adding a preselected value having a binary value of +1, 0 or -1 to said stored coefficient once each horizontal line period of said color signal according to determined relationships between said chrominance signal and a reference chrominance signal if said chrominance signal meets said minimum signal value, or by adding a binary -1 to said stored coefficient once each horizontal line period of said color signal if said chrominance signal fails to meet said minimum signal value; and multiplying said chrominance signal by said stored coefficient to produce a chrominance output signal by interpreting said stored coefficient as a floating point number such that the stored coefficient is effectively modified by a value much less than 1 each horizontal line period, whereby said method for automatic color control operates as if a step of vertical filtering were included; such that said chrominance signal is killed when said coefficient is reduced to zero and said chrominance signal is automatically controlled when said coefficient is greater than zero.

Claim 6

A digital automatic color control and chroma killer (ACC/ACK) device, comprising: ACK circuitry for detecting when a color signal fails to meet a minimum signal value; and ACC circuitry for modifying amplitudes of said color signal comprising: a coefficient generator which forms a coefficient responsive to said ACK circuitry or according to determined relationships between said color signal and a reference color signal, wherein said coefficient generator comprises an adder which adds a binary value of +1, 0 or -1 to said coefficient once each horizontal line period of said color signal, a coefficient storage circuit for storing said coefficient connected to said coefficient generator, and a multiplier having a first input connected to an output of said coefficient generator and having said color signal connected to a second input and a color output signal connected to an output of said multiplier, wherein said multiplier is a floating point multiplier which interprets said coefficient as a floating point number such that the coefficient generator effectively changes the coefficient by a value much less than 1 each horizontal line period, whereby said ACC device operates as if a vertical filter were included, such that said color signal is killed when said coefficient generator reduces said coefficient value to zero and said color signal is automatically controlled when said coefficient generator produces a non-zero coefficient value.

Claim 7

A digital automatic color control and chroma killer (ACC/ACK) device, comprising: ACK circuitry for detecting when a color signal fails to meet a minimum signal value; and ACC circuitry for modifying amplitudes of said color signal comprising: a coefficient generator which forms a coefficient responsive to said ACK circuitry or according to determined relationships between said color signal and a reference color signal, wherein said coefficient generator comprises an adder which adds a binary value of +1, 0 or -1 to said coefficient once each horizontal line period of said color signal, a coefficient storage circuit for storing said coefficient connected to said coefficient generator, and a multiplier having a first input connected to an output of said coefficient generator and having said color signal connected to a second input and a color output signal connected to an output of said multiplier, wherein said multiplier is a floating point multiplier which interprets said coefficient as a floating point number such that the coefficient generator effectively changes the coefficient by a value much less than 1 each horizontal line period, whereby said ACC device operates as if a vertical filter were included, such that said color signal is killed when said coefficient generator reduces said coefficient value to zero and said color signal is automatically controlled when said coefficient generator produces a non-zero coefficient value.

Claim 8

The ACC/ACK device of claim 4, wherein: said multiplier multiplies in parallel all data of a horizontal line of said color signal with said coefficient.

Claim 9

A digital image or video processing system including: separator circuitry for separating an incoming video or image signal into luminance and chroma components; ACC/ACK device for normalizing or killing said chroma component; processing circuitry for receiving said luminance component and said chroma component from said ACC/ACK device and outputting color signals; said ACC/ACK device comprising: ACK circuitry for detecting when said chroma component fails to meet a minimum signal value; and ACC circuitry for modifying amplitudes of said chroma component comprising: a coefficient generator which form a coefficient responsive to said ACK circuitry or according to determined relationships between said chroma component and a reference color signal, wherein said coefficient generator comprises an adder which adds a binary value of +1, 0 or -1 to said coefficient once each horizontal line period of said chroma component, a coefficient storage circuit for storing said coefficient connected to said coefficient generator, and a multiplier having a first input connected to an output of said coefficient generator and having said chroma component connected to a second input and an output of said multiplier connected to said processing circuitry, wherein said multiplier is a floating point multiplier which interprets said coefficient as a floating point number such that the coefficient generator effectively changes the coefficient by a value much less than 1 each horizontal line period, whereby said ACC device operates as if a vertical filter were included, such that said chroma component is killed when said coefficient generator reduces said coefficient value to zero and said chroma component is automatically controlled when said coefficient generator produces a non-zero coefficient value.

Claim 10

A digital image or video processing system including: separator circuitry for separating an incoming video or image signal into luminance and chroma components; ACC/ACK device for normalizing or killing said chroma component; processing circuitry for receiving said luminance component and said chroma component from said ACC/ACK device and outputting color signals; said ACC/ACK device comprising: ACK circuitry for detecting when said chroma component fails to meet a minimum signal value; and ACC circuitry for modifying amplitudes of said chroma component comprising: a coefficient generator which form a coefficient responsive to said ACK circuitry or according to determined relationships between said chroma component and a reference color signal, wherein said coefficient generator comprises an adder which adds a binary value of +1, 0 or -1 to said coefficient once each horizontal line period of said chroma component, a coefficient storage circuit for storing said coefficient connected to said coefficient generator, and a multiplier having a first input connected to an output of said coefficient generator and having said chroma component connected to a second input and an output of said multiplier connected to said processing circuitry, wherein said multiplier is a floating point multiplier which interprets said coefficient as a floating point number such that the coefficient generator effectively changes the coefficient by a value much less than 1 each horizontal line period, whereby said ACC device operates as if a vertical filter were included, such that said chroma component is killed when said coefficient generator reduces said coefficient value to zero and said chroma component is automatically controlled when said coefficient generator produces a non-zero coefficient value.

Claim 11

The image or video processing system as in claim 6, said system including: synchronization circuitry for synchronizing operations within said system.