Patent US5650757A successfully refreshed from Google Patents.
US5650757A
Expired / Lapsed
US
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Impedance stepping for increasing the operating speed of computer backplane busses
Assignee: Hewlett Packard Enterprise Development LP
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Filing: 1996-03-27
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Granted: 1997-07-22
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Expires: 2016-03-27
Abstract
Abstract A computer interconnection backplane bus. The interconnection backplane bus is formed by bus transmission lines and component connection transmission line sections that interconnect components of the computer. The characteristic impedance of the bus transmission lines is stepped so that the number of impedance mismatches on the interconnection bus is minimized. The components of the computer are connected to the bus at the interconnections nodes of the bus transmission lines through terminated component connection transmission line sections. The impedance mismatches that exist on the interconnection backplane bus are strategically placed so that the distortion to a transitioning voltage level edge is in the form of overshoot rather than under shoot or ringing.
Inventors
- 👤 V. Alan Barber
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 21:20
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4063; G06F13/4068; G06F13/4072; H; H01; H01P; H01P5/00; H01P5/12; H04; H04L; H04L25/00; H04L25/02; H04L25/08
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
217 words
An interconnect bus comprising: a plurality of N bus transmission line sections including a first bus transmission line end section and a second bus transmission line end section, wherein the plurality of N bus transmission line sections are connected in series with the first bus transmission line end section at one end, and the second bus transmission line end section at the other end; the first bus transmission line end section and the second bus transmission line end section having a characteristic impedance of Z o ; a middle region comprising at least one middle bus transmission line section; the characteristic impedance of the N bus transmission line sections progressing down in value from a maximum impedance at the first bus transmission line end section and the second bus transmission line end section, to a minimum impedance at the middle region; a plurality of (N+1) nodes, one node at an unconnected end of the first bus transmission line section, another node at an unconnected end of the second bus transmission line section, and the rest of the plurality of nodes formed by the interconnections between the rest of the plurality bus transmission line sections; and a computer interconnect component electrically connected to one of the plurality of nodes, the computer interconnect component having a component load impedance.
Claim 2
Dependent Claim
217 words
An interconnect bus comprising: a plurality of N bus transmission line sections including a first bus transmission line end section and a second bus transmission line end section, wherein the plurality of N bus transmission line sections are connected in series with the first bus transmission line end section at one end, and the second bus transmission line end section at the other end; the first bus transmission line end section and the second bus transmission line end section having a characteristic impedance of Z o ; a middle region comprising at least one middle bus transmission line section; the characteristic impedance of the N bus transmission line sections progressing down in value from a maximum impedance at the first bus transmission line end section and the second bus transmission line end section, to a minimum impedance at the middle region; a plurality of (N+1) nodes, one node at an unconnected end of the first bus transmission line section, another node at an unconnected end of the second bus transmission line section, and the rest of the plurality of nodes formed by the interconnections between the rest of the plurality bus transmission line sections; and a computer interconnect component electrically connected to one of the plurality of nodes, the computer interconnect component having a component load impedance.
Claim 3
Dependent Claim
33 words
The interconnect bus recited in claim 1, further comprising a termination having a termination load resistance, the termination connected to one of the nodes to which the computer interconnect element is not connected.
Claim 4
Dependent Claim
24 words
The interconnect bus recited in claim 1, wherein the computer interconnect component is a driver component that determines the voltage level of the bus.
Claim 5
Dependent Claim
46 words
The interconnect bus recited in claim 1, wherein the computer interconnect component is electrically connected to the one of the plurality of nodes through a component connection transmission line section, the component connection transmission line section having a characteristic impedance substantially equal to Z o .
Claim 6
Dependent Claim
102 words
The interconnect bus recited in claim 1, wherein if N is an odd integer then: a jth bus transmission line section has a characteristic impedance of (Z o /j), where j=1 for the first bus transmission line end section and the second bus transmission line end section, j=(N+1)/2 for a middle bus transmission line section, and j increments progressively stepping through all of the bus transmission lines sections from the first bus transmission line end section and the second bus transmission line end section towards the middle bus transmission line section, where j is an integer that varies from 1 to (N+1)/2.
Claim 7
Dependent Claim
121 words
The interconnect bus recited in claim 1, wherein if N is an even integer then: a jth bus transmission line section has a characteristic impedance of (Z o /j), where j=1 for the first bus transmission line end section and the second bus transmission line end section, and j=N/2 for a first middle bus transmission line section and a second middle bus transmission line section, and j increments progressively stepping through all of the bus transmission lines sections from the first bus transmission line end section and the second bus transmission line end section towards the first middle bus transmission line section and the second middle bus transmission line section, where j is an integer that varies from 1 to N/2.
Claim 8
Dependent Claim
19 words
The interconnect bus recited in claim 1, wherein the component load resistance is substantially equal to Z o .
Claim 9
Dependent Claim
51 words
The interconnect bus recited in claim 2, wherein the termination and the computer interconnect component are each electrically connected to a unique one of the plurality of nodes though a component connection transmission line section, the component connection transmission line sections having a characteristic impedance substantially equal to Z o .
Claim 10
Dependent Claim
20 words
The interconnect bus recited in claim 8, wherein the termination has a termination resistance substantially equal to Z o .
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-07-21 | 2001-01-20 | 2001-07-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-07-21 | 2005-01-20 | 2005-07-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-07-21 | 2009-01-20 | 2009-07-22 | $7700.00 | Window Closed / Lapsed |