Failsafe voltage regulator with warning signal driver

Claim 2

An integrated circuit having a first input terminal, a second input terminal, a third input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the first input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the first input terminal is within a first predetermined voltage range; a device driver coupled to the second input terminal and to the second output terminal, wherein placing a digital logic level on the second input terminal prevents current flow through the second output terminal; and a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range, the warning signal driver being powered by energy from a current flowing into the first input terminal, the third input terminal being capable of carrying a voltage different from a voltage carried on the first output terminal, wherein placing a digital logic level on the third input terminal enables current flow through the third output terminal.

Claim 3

The integrated circuit of claim 1, further comprising a voltage monitor circuit and a reset circuit, the voltage monitor circuit monitoring the output voltage of the voltage regulator and causing the reset circuit to output a reset signal on a reset output terminal of the integrated circuit if the output voltage is not within the second predetermined voltage range.

Claim 4

The integrated circuit of claim 1, wherein the reset circuit is also coupled to a reset delay terminal of the integrated circuit, a capacitance on said reset delay terminal determining at least in part a minimum period of the reset signal.

Claim 5

The integrated circuit of claim 1, wherein the warning signal is a current flowing into the third output terminal.

Claim 6

The integrated circuit of claim 1, further comprising a thermal shutdown circuit coupled to the voltage regulator for changing an operation of the voltage regulator if a temperature of the voltage regulator exceeds a predetermined threshold temperature.

Claim 7

The integrated circuit of claim 1, further comprising an overvoltage shutdown circuit coupled to the first input terminal, the overvoltage shutdown circuit electrically coupling the first output terminal to a reference potential if the input voltage exceeds a predetermined threshold voltage.

Claim 8

The integrated circuit of claim 1, wherein the second predetermined voltage range does not include zero volts.

Claim 9

The integrated circuit of claim 7, wherein the second predetermined voltage range is approximately 4.5 volts to approximately 5.5 volts.

Claim 10

An integrated circuit having a first input terminal, a second input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the first input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the first input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal and the second input terminal so that placing a digital logic level on the second input terminal prevents current flow through the second output terminal; a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range; and a resistance coupled to the second input terminal such that current flow through the second output terminal is prevented if no circuitry outside the integrated circuit is driving a predetermined voltage onto the second input terminal.

Claim 11

An integrated circuit having a first input terminal, a second input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the first input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the first input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal and the second input terminal so that placing a digital logic level on the second input terminal prevents current flow through the second output terminal; a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range; and a resistance coupled to the second input terminal such that current flow through the second output terminal is prevented if no circuitry outside the integrated circuit is driving a predetermined voltage onto the second input terminal.

Claim 12

An integrated circuit having a first input terminal, a second input terminal, a third input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the first input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the first input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal and the second input terminal so that placing a digital logic level on the second input terminal prevents current flow through the second output terminal; a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range, the third input terminal being coupled to the warning signal driver so that placing a digital logic level on the third input terminal enables current flow through the third output terminal; and a resistance coupled to the third input terminal such that current flow through the third output terminal is enabled if no circuitry outside the integrated circuit is driving a predetermined voltage onto the third input terminal.

Claim 13

An integrated circuit having a first input terminal, a second input terminal, a third input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the first input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the first input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal and the second input terminal so that placing a digital logic level on the second input terminal prevents current flow through the second output terminal; a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range, the third input terminal being coupled to the warning signal driver so that placing a digital logic level on the third input terminal enables current flow through the third output terminal; and a resistance coupled to the third input terminal such that current flow through the third output terminal is enabled if no circuitry outside the integrated circuit is driving a predetermined voltage onto the third input terminal.

Claim 14

An integrated circuit having an input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal; and a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range; and a snap on/off circuit which monitors the output voltage of the voltage regulator and if the output voltage reaches a first predetermined voltage level the snap on/off circuit couples the first output terminal to a reference potential.

Claim 15

An integrated circuit having an input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal; and a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range; and a snap on/off circuit which monitors the output voltage of the voltage regulator and if the output voltage reaches a first predetermined voltage level the snap on/off circuit couples the first output terminal to a reference potential.

Claim 16

An integrated circuit having a first input terminal, a second input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the first input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the first input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal; and a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range, wherein the second input terminal is an enable input terminal and wherein placing a digital logic level on the inhibit input terminal prevents current flow through the second output terminal and enables current flow through the third output terminal.

Claim 17

An integrated circuit having a first input terminal, a second input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the first input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the first input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal; and a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range, wherein the second input terminal is an enable input terminal and wherein placing a digital logic level on the inhibit input terminal prevents current flow through the second output terminal and enables current flow through the third output terminal.

Claim 18

An integrated circuit having an input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal; and a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range, the warning signal driver being powered by energy from a current flowing into the input terminal, wherein the integrated circuit also has a fault output terminal, the device driver comprising a current monitor circuit and the warning signal driver comprising a current monitor circuit, a fault signal being asserted onto the fault output terminal if the current monitor circuit of the device driver detects an error condition on the second output terminal or if the current monitor circuit of the warning signal driver detects an error condition on the third output terminal.

Claim 19

An integrated circuit having an input terminal, a first output terminal, a second output terminal, and a third output terminal, comprising: a voltage regulator coupled to the input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal; and a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range, the warning signal driver being powered by energy from a current flowing into the input terminal, wherein the integrated circuit also has a fault output terminal, the device driver comprising a current monitor circuit and the warning signal driver comprising a current monitor circuit, a fault signal being asserted onto the fault output terminal if the current monitor circuit of the device driver detects an error condition on the second output terminal or if the current monitor circuit of the warning signal driver detects an error condition on the third output terminal.

Claim 20

An integrated circuit having a first input terminal, a second input terminal, a first output terminal, a second output terminal, a third output terminal, and a fourth output terminal, comprising: a voltage regulator coupled to the first input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the first input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal; and a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range, wherein the fourth output terminal is a fault output terminal, the device driver comprising a current monitor circuit and the warning signal driver comprising a current monitor circuit, a fault signal being asserted onto the fourth output terminal if the current monitor circuit of the device driver detects an error condition on the second output terminal or if the current monitor circuit of the warning signal driver detects an error condition on the third output terminal, and wherein the second input terminal is a lamp inrush terminal, a capacitance on the lamp inrush terminal determining at least in part a period of time in which a high current error condition on the third output terminal does not result in the fault signal being asserted onto the fourth output terminal.

Claim 21

An integrated circuit having a first input terminal, a second input terminal, a first output terminal, a second output terminal, a third output terminal, and a fourth output terminal, comprising: a voltage regulator coupled to the first input terminal and coupled to the first output terminal, the voltage regulator providing on the first output terminal an output voltage within a second predetermined voltage range if an input voltage on the first input terminal is within a first predetermined voltage range; a device driver coupled to the second output terminal; and a warning signal driver which generates a warning signal on the third output terminal if the output voltage is not within the second predetermined voltage range, wherein the fourth output terminal is a fault output terminal, the device driver comprising a current monitor circuit and the warning signal driver comprising a current monitor circuit, a fault signal being asserted onto the fourth output terminal if the current monitor circuit of the device driver detects an error condition on the second output terminal or if the current monitor circuit of the warning signal driver detects an error condition on the third output terminal, and wherein the second input terminal is a lamp inrush terminal, a capacitance on the lamp inrush terminal determining at least in part a period of time in which a high current error condition on the third output terminal does not result in the fault signal being asserted onto the fourth output terminal.

Claim 22

An integrated circuit, comprising: a voltage regulator circuit coupled to a voltage input terminal of the integrated circuit and coupled to a voltage output terminal of the integrated circuit; a reset circuit coupled to the voltage regulator circuit and coupled to a reset output terminal of the integrated circuit; a first driver circuit coupled to a first driver output terminal and coupled to a first driver input terminal, the first driver circuit comprising means for causing a fault signal to be output from a fault output terminal of the integrated circuit if an incorrect amount of current is flowing through the first driver output terminal; and a second driver circuit coupled to a second driver output terminal and coupled to a second driver input terminal, the second driver circuit comprising means for causing a fault signal to be output from the fault output terminal of the integrated circuit if an incorrect amount of current is flowing through the second driver output terminal.

Claim 23

An integrated circuit, comprising: a voltage regulator circuit coupled to a voltage input terminal of the integrated circuit and coupled to a voltage output terminal of the integrated circuit; a reset circuit coupled to the voltage regulator circuit and coupled to a reset output terminal of the integrated circuit; a first driver circuit coupled to a first driver output terminal and coupled to a first driver input terminal, the first driver circuit comprising means for causing a fault signal to be output from a fault output terminal of the integrated circuit if an incorrect amount of current is flowing through the first driver output terminal; and a second driver circuit coupled to a second driver output terminal and coupled to a second driver input terminal, the second driver circuit comprising means for causing a fault signal to be output from the fault output terminal of the integrated circuit if an incorrect amount of current is flowing through the second driver output terminal.

Claim 24

The integrated circuit of claim 15, wherein said means for causing a fault signal of the first driver circuit comprises means for determining if a current flowing through the first driver output terminal is within a predetermined range, and wherein said means for causing a fault signal of the second driver circuit comprises means for determining if a current flowing through the second driver output terminal is within a predetermined range.

Claim 25

The integrated circuit of claim 15, wherein the integrated circuit also has reset delay input terminal, the reset circuit being coupled to the reset delay input terminal.

Claim 26

An integrated circuit, comprising: a voltage regulator circuit coupled to a voltage input terminal of the integrated circuit and coupled to a voltage output terminal of the integrated circuit; a reset circuit coupled to the voltage regulator circuit and coupled to a reset output terminal of the integrated circuit; a first driver circuit coupled to a first driver output terminal and coupled to a first driver input terminal, the first driver circuit comprising means for causing a fault signal to be output from a fault output terminal of the integrated circuit if an incorrect amount of current is flowing through the first driver output terminal; a second driver circuit coupled to a second driver output terminal and coupled to a second driver input terminal, the second driver circuit comprising means for causing a fault signal to be output from the fault output terminal of the integrated circuit if an incorrect amount of current is flowing through the second driver output terminal; and an inhibit input terminal coupled to the means for causing a fault signal of the first driver circuit and coupled to the means for causing a fault signal of the second driver circuit.

Claim 27

An integrated circuit, comprising: a voltage regulator circuit coupled to a voltage input terminal of the integrated circuit and coupled to a voltage output terminal of the integrated circuit; a reset circuit coupled to the voltage regulator circuit and coupled to a reset output terminal of the integrated circuit; a first driver circuit coupled to a first driver output terminal and coupled to a first driver input terminal, the first driver circuit comprising means for causing a fault signal to be output from a fault output terminal of the integrated circuit if an incorrect amount of current is flowing through the first driver output terminal; a second driver circuit coupled to a second driver output terminal and coupled to a second driver input terminal, the second driver circuit comprising means for causing a fault signal to be output from the fault output terminal of the integrated circuit if an incorrect amount of current is flowing through the second driver output terminal; and an inhibit input terminal coupled to the means for causing a fault signal of the first driver circuit and coupled to the means for causing a fault signal of the second driver circuit.