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US5126659A Expired / Lapsed US ⏱️ 0.0 years remaining

Enablement of a test mode in an electronic module with limited pin-outs

Assignee: Motorola Solutions Inc
•
Filing: 1990-07-13
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Granted: 1992-06-30
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Expires: 2010-07-13
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Abstract

Abstract A method for establishing a test mode in an electronic module (10) having an internal fault detector (26) that limits the current in an output transistor (Q1) when an abnormal signal level appears at an output pin (16). An abnormal signal level is intentionally established on the output pin to enable the fault detector, and such enablement is sensed to trigger the test mode within the module. Apparatus for implementing this method in a voltage regulator is also disclosed.

Inventors

  • 👤 Arthur J. Edwards

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 17:52
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/31701; G01R31/2851; G01R31/2884

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 133 words
An electronic module capable of being selectively put into a test mode, comprising: an output transistor having an output terminal; a signal output pin coupled to the output terminal; fault detection circuitry sensing the operation of the output transistor for causing the level of current in the output transistor to be at least reduced when the output transistor experiences an abnormal signal level; means responsive to the fault detection circuitry causing the level of current in the output transistor to be reduced for developing a test-mode signal; and means responsive to the test mode signal for initiating a functional test of the module, whereby the module can be put into the test mode by intentionally establishing a condition at the output terminal that causes the output transistor to experience an abnormal signal level.
Claim 2
Dependent Claim 133 words
An electronic module capable of being selectively put into a test mode, comprising: an output transistor having an output terminal; a signal output pin coupled to the output terminal; fault detection circuitry sensing the operation of the output transistor for causing the level of current in the output transistor to be at least reduced when the output transistor experiences an abnormal signal level; means responsive to the fault detection circuitry causing the level of current in the output transistor to be reduced for developing a test-mode signal; and means responsive to the test mode signal for initiating a functional test of the module, whereby the module can be put into the test mode by intentionally establishing a condition at the output terminal that causes the output transistor to experience an abnormal signal level.
Claim 3
Dependent Claim 36 words
An electronic module as set forth in claim 4 wherein the means for developing the test mode signal includes a flip-flop for developing a two-state output signal, one of said signal states being the test-mode signal.
Claim 4
Dependent Claim 159 words
A voltage regulator capable of being selectively put into a test mode, comprising: an output transistor having an output terminal; a signal output pin coupled to the output terminal; fault detection circuitry sensing the operation of the output transistor for causing the level of current in the output transistor to be at least reduced when the output transistor experiences an abnormal signal level; means responsive to the fault detection circuitry causing the level of current in the output transistor to be reduced for developing a test-mode signal; a first reference voltage source; a control circuit sensing the first reference voltage source and controlling the current flow in the output transistor; and means responsive to the test-mode signal for initiating a functional test of the voltage regulator, including a second reference voltage source and switch means responsive to the test-mode signal for causing the control circuit to sense the second reference voltage source rather than the first reference voltage source.
Claim 5
Dependent Claim 159 words
A voltage regulator capable of being selectively put into a test mode, comprising: an output transistor having an output terminal; a signal output pin coupled to the output terminal; fault detection circuitry sensing the operation of the output transistor for causing the level of current in the output transistor to be at least reduced when the output transistor experiences an abnormal signal level; means responsive to the fault detection circuitry causing the level of current in the output transistor to be reduced for developing a test-mode signal; a first reference voltage source; a control circuit sensing the first reference voltage source and controlling the current flow in the output transistor; and means responsive to the test-mode signal for initiating a functional test of the voltage regulator, including a second reference voltage source and switch means responsive to the test-mode signal for causing the control circuit to sense the second reference voltage source rather than the first reference voltage source.
Claim 6
Dependent Claim 134 words
An electronic module capable of being selectively put into a test mode, comprising: an output transistor having an output terminal; a signal output pin coupled to the output terminal fault detection circuitry sensing the operation of the output transistor and responsive to abnormally high levels of current in the output transistor for causing the level of current in the output transistor to be at least reduced when the output transistor experience an abnormal signal level; means responsive to the fault detection circuitry causing the level of current in the output transistor to be reduced for developing a test-mode signal; and means responsive to the test mode signal for initiating a functional test of the module, whereby the test mode is initiated by intentionally establishing an abnormally high level of current at the output pin.
Claim 7
Dependent Claim 134 words
An electronic module capable of being selectively put into a test mode, comprising: an output transistor having an output terminal; a signal output pin coupled to the output terminal fault detection circuitry sensing the operation of the output transistor and responsive to abnormally high levels of current in the output transistor for causing the level of current in the output transistor to be at least reduced when the output transistor experience an abnormal signal level; means responsive to the fault detection circuitry causing the level of current in the output transistor to be reduced for developing a test-mode signal; and means responsive to the test mode signal for initiating a functional test of the module, whereby the test mode is initiated by intentionally establishing an abnormally high level of current at the output pin.
Claim 8
Dependent Claim 86 words
An electronic module as set forth in claim 4 wherein the fault detector causes the output transistor to be turned off responsive to sensing an abnormally high level of current therein, and further including a second output transistor coupled to the output pin in parallel with the other output transistor, and wherein the second output transistor is not turned off by the fault detector, whereby the second output transistor remains capable of supplying current to the output pin while the module is in the test mode.
Claim 9
Dependent Claim 147 words
An IC capable of being selectively put into a test mode, wherein the IC has only three input/output pins, one pin for receiving input power, another pin for receiving a reference potential, and the third pin for delivering output current to a load, the IC comprising: an output transistor coupled to the output pin for delivering output current thereto; a fault detector sensing the level of current in the output transistor for causing the level of current in the output transistor to be at least reduced when an abnormally high level of current is sensed; a bi-stable circuit for generating a test-mode signal responsive to the fault detector causing the level of current in the output transistor to be reduced; means responsive to the test mode signal for initiating a functional test of the IC; and means for resetting the IC to terminate the test mode signal.
Claim 10
Dependent Claim 147 words
An IC capable of being selectively put into a test mode, wherein the IC has only three input/output pins, one pin for receiving input power, another pin for receiving a reference potential, and the third pin for delivering output current to a load, the IC comprising: an output transistor coupled to the output pin for delivering output current thereto; a fault detector sensing the level of current in the output transistor for causing the level of current in the output transistor to be at least reduced when an abnormally high level of current is sensed; a bi-stable circuit for generating a test-mode signal responsive to the fault detector causing the level of current in the output transistor to be reduced; means responsive to the test mode signal for initiating a functional test of the IC; and means for resetting the IC to terminate the test mode signal.
Claim 11
Dependent Claim 36 words
An IC as set forth in claim 6 wherein the IC is a voltage regulator, and wherein the current from the output pin may be used to supply current to the field winding of an alternator.
Claim 12
Dependent Claim 63 words
An IC as set forth in claim 6 wherein the fault detector causes the output transistor to be turned off responsive to sensing an abnormally high level of current therein, and further including a second output transistor coupled to the third input/output pin, and wherein the second output transistor remains on when the other output transistor is turned off by the fault detector.
Claim 13
Dependent Claim 164 words
A single-chip automotive voltage regulator IC having only three input/output pins, one of the pins being adapted to receive battery voltage, another of the pins being adapted to receive a reference potential , and the third pin being an output pin adapted to deliver an output current to an alternator, the regulator comprising: an output transistor coupled to the output pin for delivering the output current thereto; an over-current detector sensing the level of current in the output transistor and developing an output signal upon sensing that the level of current exceeds a selected threshold; control circuitry coupled to the over-current detector and to the output transistor for at least reducing the level of current in the output transistor responsive to the over-current detector sensing a level of current that exceeds the threshold; and circuitry responsive to said output signal for generating a test-mode signal; and test circuitry responsive to the test mode signal for initiating a preselected functional test of the voltage regulator.
Claim 14
Dependent Claim 164 words
A single-chip automotive voltage regulator IC having only three input/output pins, one of the pins being adapted to receive battery voltage, another of the pins being adapted to receive a reference potential , and the third pin being an output pin adapted to deliver an output current to an alternator, the regulator comprising: an output transistor coupled to the output pin for delivering the output current thereto; an over-current detector sensing the level of current in the output transistor and developing an output signal upon sensing that the level of current exceeds a selected threshold; control circuitry coupled to the over-current detector and to the output transistor for at least reducing the level of current in the output transistor responsive to the over-current detector sensing a level of current that exceeds the threshold; and circuitry responsive to said output signal for generating a test-mode signal; and test circuitry responsive to the test mode signal for initiating a preselected functional test of the voltage regulator.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-06-30 1995-12-30 1996-06-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-06-30 1999-12-30 2000-06-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-06-30 2003-12-30 2004-06-30 $7700.00 Window Closed / Lapsed

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