Automatic gain-control transimpedence amplifier

Claim 2

An automatic gain control transimpedance amplifier comprising: an operational amplifier having input and output nodes; a photodiode having one end operatively coupled to the input node of said operational amplifier, said photodiode receiving input optical signal and providing corresponding current signal; and feedback means operatively coupled between the input and output nodes of said operational amplifier, said feedback means comprising a feedback PIN diode forward biased by a DC supply voltage inductively coupled to said output node of said voltage amplifier, said feedback means providing a feedback resistance that is substantially linearly dependent on the inverse of a DC component of said current signal, whereby increasing the amplitude of said optical signal increases said DC component, thereby reducing said feedback resistance.

Claim 3

The transimpedance amplifier of claim 1 further comprising a capacitive filtering means operatively coupled between the input node of said operational amplifier and said photodiode and said feedback means.

Claim 4

The transimpedance amplifier of claim 1 wherein said operational amplifier comprises a single-stage inverting voltage amplifier, whereby increasing the amplitude of said optical signal reduces the feedback resistance while simultaneously reducing the voltage gain of said inverting voltage amplifier and the input impedance to the photodiode.

Claim 5

The transimpedance amplifier of claim 3 wherein said single-stage inverting voltage amplifier comprises first and second field effect transistors (FETs) serially connected along their drain-to-source paths with the drain terminal of said second FET operatively connected to the source terminal of said first FET, the drain terminal of said first FET being operatively connected to said output node of said operational amplifier, the gate terminal of said second FET being connected to said input node of said operational amplifier, the gate terminal of said first FET being resistively coupled to the source terminal of said second FET through a first resistive means, and the source terminal of said second transistor being resistively coupled to a ground potential through a second resistive means.

Claim 6

The transimpedance amplifier of claim 4 wherein said voltage amplifier further comprises a third resistive means connected between the gate terminal of said second transistor and said ground potential.

Claim 7

The transimpedance amplifier of claim 5 wherein said FETs are GaAs FETs.

Claim 8

The transimpedance amplifier of claim 1 wherein said photodiode is a PIN photodiode.

Claim 9

An automatic gain control transimpedance amplifier comprising: an operational amplifier having input and output nodes; a photodiode having one end operatively coupled to the input node of said operational amplifier, said photodiode receiving input optical signal and providing corresponding current signal; and feedback means operatively coupled between the input and output nodes of said operational amplifier, said feedback means comprising two feedback PIN diodes connected in series, each of said PIN diodes being forward biased, said feedback PIN diodes being forward biased by a DC supply voltage inductively coupled to said output node of said operational amplifier, said feedback means providing a feedback resistance that is substantially linearly dependent on the inverse of a DC component of said current signal, whereby increasing the amplitude of said optical signal increases said DC component, thereby reducing said feedback resistance.

Claim 10

An automatic gain control transimpedance amplifier comprising: an operational amplifier having input and output nodes; a photodiode having one end operatively coupled to the input node of said operational amplifier, said photodiode receiving input optical signal and providing corresponding current signal; and feedback means operatively coupled between the input and output nodes of said operational amplifier, said feedback means comprising two feedback PIN diodes connected in series, each of said PIN diodes being forward biased, said feedback PIN diodes being forward biased by a DC supply voltage inductively coupled to said output node of said operational amplifier, said feedback means providing a feedback resistance that is substantially linearly dependent on the inverse of a DC component of said current signal, whereby increasing the amplitude of said optical signal increases said DC component, thereby reducing said feedback resistance.

Claim 11

An automatic gain control transimpedance amplifier comprising: an operational amplifier having input and output nodes; a photodiode having one end operatively coupled to the input node of said operation amplifier, said photodiode receiving input optical signal and providing a corresponding current signal; and a feedback branch operatively coupled between the input and output nodes of said operational amplifier, said feedback branch comprising a feedback resistive means connected in parallel to a forward biased feedback PIN diode having a dynamic resistance substantially linearly dependent on the inverse of a DC component of the current passing said PIN diode, said feedback PIN diode being forward biased by a DC supply voltage inductively coupled to said output node of said voltage amplifier, whereby increasing the amplitude of said optical signal increases the amplitudes of the DC component, thereby reducing the dynamic resistance of said feedback PIN diode, and thereby reducing an effective feedback resistance of said feedback branch.

Claim 12

An automatic gain control transimpedance amplifier comprising: an operational amplifier having input and output nodes; a photodiode having one end operatively coupled to the input node of said operation amplifier, said photodiode receiving input optical signal and providing a corresponding current signal; and a feedback branch operatively coupled between the input and output nodes of said operational amplifier, said feedback branch comprising a feedback resistive means connected in parallel to a forward biased feedback PIN diode having a dynamic resistance substantially linearly dependent on the inverse of a DC component of the current passing said PIN diode, said feedback PIN diode being forward biased by a DC supply voltage inductively coupled to said output node of said voltage amplifier, whereby increasing the amplitude of said optical signal increases the amplitudes of the DC component, thereby reducing the dynamic resistance of said feedback PIN diode, and thereby reducing an effective feedback resistance of said feedback branch.

Claim 13

The transimpedance amplifier of claim 9 wherein said photodiode is a PIN photodiode.

Claim 14

The transimpedance amplifier of claim 9 further comprises a capacitive filtering means operatively coupled between the input node of said operational amplifier and said photodiode and said feedback branch.

Claim 15

The transimpedance amplifier of claim 9 wherein said operational amplifier comprises a single-stage inverting voltage amplifier, whereby increasing the amplitude of said input optical signal reduces the dynamic resistance of said feedback PIN diode, thereby reducing the effective feedback resistance of said feedback branch while simultaneously reducing the voltage gain of said inverting voltage amplifier and the input impedance of said photodiode.

Claim 16

The transimpedance amplifier of claim 12 wherein said single-stage inverting voltage amplifier comprises first and second field effect transistors (FETs) serially connected along their drain-to-source path with said drain terminal of said second FET operatively connected to said source terminal of said first FET, the drain terminal of said first FET being operatively connected to said output node of said operational amplifier, the gate terminal of said second FET being connected to said input node of said operational amplifier, the gate terminal of said first FET being resistively coupled to the source terminal of said second FET through a first resistive means, and the source terminal of said second transistor being resistively coupled to a ground potential through a second resistive means.

Claim 17

The transimpedance amplifier of claim 13 wherein said voltage amplifier further comprises a third resistive means connected between the gate terminal of the second FET and the ground potential.

Claim 18

The transimpedance amplifier of claim 13 wherein said FETs are GaAs FETs.

Claim 19

An automatic gain control transimpedance amplifier comprising: an operational amplifier having input and output nodes; a photodiode having one end operatively coupled to said input node of said operation amplifier, said photodiode receiving input optical input signal and producing corresponding current signal; and a feedback branch coupled between said input and output nodes of said operational amplifier, said feedback branch comprising a feedback resistive means connected in parallel to serially connected, forward biased first and second feedback PIN diodes, said feedback PIN diodes being forward biased by a DC supply voltage inductively coupled to said output node of said voltage amplifier, whereby increasing the amplitude of said input optical signal increases the amplitude of a DC component of the current passing said PIN diodes, thereby reducing the dynamic resistance of said feedback PIN diodes and the feedback resistance of said feedback branch.

Claim 20

An automatic gain control transimpedance amplifier comprising: an operational amplifier having input and output nodes; a photodiode having one end operatively coupled to said input node of said operation amplifier, said photodiode receiving input optical input signal and producing corresponding current signal; and a feedback branch coupled between said input and output nodes of said operational amplifier, said feedback branch comprising a feedback resistive means connected in parallel to serially connected, forward biased first and second feedback PIN diodes, said feedback PIN diodes being forward biased by a DC supply voltage inductively coupled to said output node of said voltage amplifier, whereby increasing the amplitude of said input optical signal increases the amplitude of a DC component of the current passing said PIN diodes, thereby reducing the dynamic resistance of said feedback PIN diodes and the feedback resistance of said feedback branch.

Claim 21

The transimpedance amplifier of claim 16 wherein said photodiode is a PIN photodiode.

Claim 22

The transimpedance amplifier of claim 16 further comprising a capacitive filtering means operatively coupled between said input node of said operational amplifier and said photodiode and said feedback branch.

Claim 23

The transimpedance amplifier of claim 16 wherein said operational amplifier comprises a single-stage inverting voltage amplifier, whereby increasing the amplitude of said DC component of said input optical signal reduces the dynamic resistance of said feedback PIN diode, thereby reducing the effective feedback resistance of said feedback branch as well as reducing the voltage gain of said inverting voltage amplifier.

Claim 24

The transimpedance amplifier of claim 19 wherein said single-stage inverting voltage amplifier comprises first and second field effect transistors (FETs) serially connected along their drain-to-source path with said drain terminal of said second FET operatively connected to said source terminal of said first FET, the drain terminal of said first FET being operatively connected to said output node of said operational amplifier, the gate terminal of said second FET being connected to said input node of said operational amplifier, the gate terminal of said first FET being resistively coupled to the source terminal of said second FET through a first resistive means, and the source terminal of said second transistor being resistively coupled to a ground potential through a second resistive means.

Claim 25

The transimpedance amplifier of claim 20 wherein said voltage amplifier further comprises a third resistive means connected between the gate terminal of said second transistor and said ground potential.

Claim 26

The transimpedance amplifier of claim 20 wherein said FETs are GaAs FETs.

Claim 27

A transimpedance amplifier comprising: an operational amplifier having input and output nodes; and feedback means operatively coupled between the input and output nodes of said operational amplifier, said feedback means comprising a feedback PIN diode forward biased by a DC supply voltage inductively coupled to the output node of said amplifier, said operational amplifier comprising a single-stage inverting voltage amplifier, said single-stage inverting voltage amplifier comprising first and second field effect transistors (FETs) serially connected along their drain-to-source paths with the drain terminal of said second FET operatively connected to the source terminal of said first FET, the drain terminal of said first FET being operatively connected to said output node of said operational amplifier, the gate terminal of said second FET being connected to said input node of said operational amplifier, the gate terminal of said first FET being resistively coupled to the source terminal of said second FET through a first resistive means, and the source terminal of said second transistor being resistively coupled to a ground potential through a second resistive means.

Claim 28

A transimpedance amplifier comprising: an operational amplifier having input and output nodes; and feedback means operatively coupled between the input and output nodes of said operational amplifier, said feedback means comprising a feedback PIN diode forward biased by a DC supply voltage inductively coupled to the output node of said amplifier, said operational amplifier comprising a single-stage inverting voltage amplifier, said single-stage inverting voltage amplifier comprising first and second field effect transistors (FETs) serially connected along their drain-to-source paths with the drain terminal of said second FET operatively connected to the source terminal of said first FET, the drain terminal of said first FET being operatively connected to said output node of said operational amplifier, the gate terminal of said second FET being connected to said input node of said operational amplifier, the gate terminal of said first FET being resistively coupled to the source terminal of said second FET through a first resistive means, and the source terminal of said second transistor being resistively coupled to a ground potential through a second resistive means.

Claim 29

The transimpedance amplifier of claim 23 wherein said voltage amplifier further comprises a third resistive means connected between the gate terminal of said second transistor and said ground potential.

Claim 30

The transimpedance amplifier of claim 23 wherein said FETs are GaAs FETs.

Claim 31

A transimpedance amplifier comprising: an operational amplifier having input and output nodes; and feedback means operatively coupled between the input and output nodes of said operational amplifier, said feedback means comprising two feedback PIN diodes connected in series, said feedback PIN diodes being forward biased by a DC supply voltage inductively coupled to said output node of said operational amplifier, said operational amplifier comprising a single-stage inverting voltage amplifier, said single-stage inverting voltage amplifier comprising first and second field effect transistors (FETs) serially connected along their drain-to-source paths with the drain terminal of said second FET operatively connected to the source terminal of said first FET, the drain terminal of said first FET being operatively connected to said output node of said operational amplifier, the gate terminal of said second FET being connected to said input node of said operational amplifier, the gate terminal of said first FET being resistively coupled to the source terminal of said second FET through a first resistive means, and the source terminal of said second transistor being resistively coupled to a ground potential through a second resistive means.

Claim 32

A transimpedance amplifier comprising: an operational amplifier having input and output nodes; and feedback means operatively coupled between the input and output nodes of said operational amplifier, said feedback means comprising two feedback PIN diodes connected in series, said feedback PIN diodes being forward biased by a DC supply voltage inductively coupled to said output node of said operational amplifier, said operational amplifier comprising a single-stage inverting voltage amplifier, said single-stage inverting voltage amplifier comprising first and second field effect transistors (FETs) serially connected along their drain-to-source paths with the drain terminal of said second FET operatively connected to the source terminal of said first FET, the drain terminal of said first FET being operatively connected to said output node of said operational amplifier, the gate terminal of said second FET being connected to said input node of said operational amplifier, the gate terminal of said first FET being resistively coupled to the source terminal of said second FET through a first resistive means, and the source terminal of said second transistor being resistively coupled to a ground potential through a second resistive means.

Claim 33

The transimpedance amplifier of claim 26 wherein said voltage amplifier further comprises a third resistive means connected between the gate terminal of said second transistor and said ground potential.

Claim 34

The transimpedance amplifier of claim 26 wherein said FETs are GaAs FETs.