US5639389A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for the production of structures
Assignee: Dyconex Patente AG
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Filing: 1995-02-16
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Granted: 1997-06-17
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Expires: 2015-02-16
Abstract
Abstract A process for the production of printed circuit boards and film circuit boards includes providing a starting product with a layer of insulating material between layers of metal. Openings are formed at desired locations through the metal and, at selected ones of those openings, openings are formed through the insulating material by plasma etching or chemical etching. The result of this is back-etching leaving projecting webs of metal extending partly across the openings. The projecting edges are removed by subjecting all of the metal surfaces to etching or electrodeplating which also thins the metal layers. The resulting structure is then plated, adding reinforcing thickness to the thinned metal layers and coating the openings through the insulating material with metal, providing interracial connections between the metal layers. The resulting intermediate can then be formed into a circuit board by forming circuit patterns in the metal layers.
Inventors
- 👤 Walter Schmidt
- 👤 Marco Martinelli
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 18:42
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4644; H05K3/4652; H05K3/0011; H05K3/0017; H05K3/0041; H05K3/40; H05K3/42; H05K3/421; H05K2201/00; H05K2201/03; H05K2201/0332; H05K2201/0335; H05K2201/0355; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09509; H05K2203/00; H05K2203/03; H05K2203/0346; H05K2203/0353; H05K2203/05; H05K2203/0548; H05K2203/0554; H05K2203/11; H05K2203/1184; H05K3/002; H05K3/0055; H05K3/425; H05K3/427; H05K3/4673; H05K3/4676
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
180 words
A process for producing printed circuit boards and film circuit boards comprising the steps of providing a starting product (A) having a layer of insulating material coated on opposite sides with layers of electrically conductive material, forming openings at selected locations through one layer of electrically conductive material, plasma etching openings in the insulating material at locations of selected ones of the openings through the one layer of conductive material in such a way that back-etching produces projecting edges of conductive material around the openings in the insulating material, and that the openings in the insulating material have walls which slope inwardly away from the layer of conductive material, removing the projecting edges by uniformly chemically etching the electrically conductive material in all accessible surface areas whereby the projecting edges are etched away and other portions of the conductive material are thinned to produce a laminated body with openings for use in a circuit board or film, and plating surfaces of the openings etched into the insulating material, thereby forming interfacial electrical connections between the layers of electrically conductive material.
Claim 2
Dependent Claim
180 words
A process for producing printed circuit boards and film circuit boards comprising the steps of providing a starting product (A) having a layer of insulating material coated on opposite sides with layers of electrically conductive material, forming openings at selected locations through one layer of electrically conductive material, plasma etching openings in the insulating material at locations of selected ones of the openings through the one layer of conductive material in such a way that back-etching produces projecting edges of conductive material around the openings in the insulating material, and that the openings in the insulating material have walls which slope inwardly away from the layer of conductive material, removing the projecting edges by uniformly chemically etching the electrically conductive material in all accessible surface areas whereby the projecting edges are etched away and other portions of the conductive material are thinned to produce a laminated body with openings for use in a circuit board or film, and plating surfaces of the openings etched into the insulating material, thereby forming interfacial electrical connections between the layers of electrically conductive material.
Claim 3
Dependent Claim
39 words
A process according to claim 1 and further including plating the openings in the insulating material with a layer of metal and concurrently plating the electrically conductive material with a layer of metal to reinforce the thinned conductive material.
Claim 4
Dependent Claim
21 words
A process according to claim 1 including forming circuit patterns in at least one of the layers of electrically conductive material.
Claim 5
Dependent Claim
46 words
A process according to claim 1 wherein the step of removing is performed instead of by uniformly chemically etching, by uniformly electrodeplating the electrically conductive material in all accessible surface areas whereby the projecting edges are deplated and other portions of the conductive material are thinned.
Claim 6
Dependent Claim
21 words
A process according to claim 1 including forming circuit patterns in at least one of the layers of electrically conductive material.
Claim 7
Dependent Claim
43 words
A process according to claim 1 wherein the insulating material is an organic, dielectric film having a thickness of between 25 and 50 μm and wherein the electrically conductive material is a layer of copper having a thickness-of between 8 and 12 μm.
Claim 8
Dependent Claim
20 words
A process according to claim 6 wherein said dielectric film is a polyimide film or a liquid crystal polymer film.
Claim 9
Dependent Claim
21 words
A process according to claim 6 wherein said dielectric film is an aramide fiber-reinforced laminate of epoxy or polyimide resin films.
Claim 10
Dependent Claim
19 words
A process according to claim 6 wherein said dielectric film is an aramide fiber-reinforced laminate of cyanate-ester resin films.
Claim 11
Dependent Claim
17 words
A process according to claim 1 wherein the step of plating includes plating with copper or palladium.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-06-16 | 2000-12-16 | 2001-06-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-06-16 | 2004-12-16 | 2005-06-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-06-16 | 2008-12-16 | 2009-06-17 | $7700.00 | Window Closed / Lapsed |