Multilayer wiring structure for attaining high-speed signal propagation

Claim 2

A multilayer wiring structure for use in a semiconductor device, comprising: a potential supply layer including a plurality of parallel strip-shaped conductors, each of which has a predetermined potential; and a signal wiring layer provided on said potential supply layer, with an insulating layer interposed therebetween, said signal wiring layer including wires which are arranged in parallel with the parallel strip-shaped conductors.

Claim 3

The multilayer wiring structure according to claim 1, further comprising: another pair of a potential supply layer and a signal wiring layer which are identical to said potential supply layer and said signal wiring layer, and which have the same positional relationship with each other as that between said potential supply layer and said signal wiring layer; and another insulating layer interposed said another pair of the potential supply layer and the signal wiring layer.

Claim 4

The multilayer wiring structure according to claim 1, wherein a width of each of the parallel strip-shaped conductors of said potential supply layer is equal to or less than twice a width of each of the wires of said signal wiring layer, and a pitch at which the parallel strip-shaped conductors are arranged is equal to or less than three times the width of said each of the wires.

Claim 5

The multilayer wiring structure according to claim 1, wherein a width of each of the parallel strip-shaped conductors of said potential supply layer is greater than a width of each of the wires of said signal wiring layer and is not greater than twice the width of said each of the wires, and a pitch at which the parallel strip-shaped conductors are arranged is greater than the width of said each of the wires and is not greater than three times the width of said each of the wires.

Claim 6

The multilayer wiring structure according to one of claims 3 and 4, wherein the wires of said signal wiring layer include at least one wire which is situated opposite to one of the parallel strip-shaped conductors and at least one wire which is situated opposite to a space between adjacent two of the parallel strip-shaped conductors.

Claim 7

The multilayer wiring structure according to claim 5, further comprising another potential supply layer which is identical to said potential supply layer, and via-holes which are formed in at least one of parallel strip-shaped conductors of said another potential supply layer at a pitch, which is equal to or less than twenty times a pitch at which the parallel strip-shaped conductors are arranged, such that the via-holes connect said potential supply layer and said another potential supply layer.

Claim 8

The multilayer wiring structure according to claim 6, wherein those parallel strip-shaped conductors of the parallel strip-shaped conductors which have a high potential and those parallel strip-shaped conductors of the parallel strip-shaped conductors which have a low potential are alternately arranged.

Claim 9

The multilayer wiring structure according to claim 1, wherein said insulating layer is formed of any one of resin material and ceramic material.

Claim 10

A multilayer wiring structure which is made up of a power supply/ground layer and a signal wiring layer situated just below or just above said power supply/ground layer, and on which a plurality of semiconductor elements are mounted, the multilayer wiring structure comprising: a plurality of parallel strip-shaped conductors which are included in said power supply/ground layer; a plurality of wires which are included in said signal wiring layer, and arranged in parallel with the parallel strip-shaped conductors of said power supply/ground layer; and an insulating layer interposed between said power supply/ground layer and said signal wiring layer.

Claim 11

A multilayer wiring structure which is made up of a power supply/ground layer and a signal wiring layer situated just below or just above said power supply/ground layer, and on which a plurality of semiconductor elements are mounted, the multilayer wiring structure comprising: a plurality of parallel strip-shaped conductors which are included in said power supply/ground layer; a plurality of wires which are included in said signal wiring layer, and arranged in parallel with the parallel strip-shaped conductors of said power supply/ground layer; and an insulating layer interposed between said power supply/ground layer and said signal wiring layer.

Claim 12

The multilayer wiring layer according to claim 9, further comprising: another pair of a power supply/ground layer and a signal wiring layer which are identical to said power supply/ground layer and said signal wiring layer, and which have the same positional relationship with each other as that between said power supply/ground layer and said power supply/ground layer; and another insulating layer interposed between said another pair of the power supply/ground layer and the signal wiring layer.

Claim 13

The multilayer wiring layer according to claim 9, wherein a width of each of the parallel strip-shaped conductors of said power supply/ground layer is equal to or less than twice a width of each of the wires of said signal wiring layer, and a pitch at which the parallel strip-shaped conductors are arranged is equal to or less than three times the width of said each of the wires.

Claim 14

The multilayer wiring layer according to claim 9, wherein a width of the parallel strip-shaped conductors of said power supply/ground layer is greater than a width of each of the wires of said signal wiring layer and is not greater than twice the width of said each of the wires, and a pitch at which the parallel strip-shaped conductors are arranged is greater than the width of said each of the wires and is not greater than three times the width of said each of the wires.

Claim 15

The multilayer wiring layer according to one of claims 11 and 12, further comprising: at least one power supply/ground layer and at least one signal wiring layer, which are identical to said power supply/ground layer and said signal wiring layer, which have the same positional relationship with each other as that between said power supply/ground layer and said signal wiring layer, and which are arranged such that said signal wiring layer and said at least one wiring layer are situated between said power supply/ground layer and said at least one power supply/ground layer; at least two insulating layers which are respectively interposed between said signal wiring layer and said at least one signal wiring layer, and said at least one signal wiring layer and said at least one power supply/ground layer; and via-holes which are formed in at least one of the parallel strip-shaped conductors of each of said power supply/ground layer and said at least one power supply/ground layer at a pitch, which is equal to or less than twenty times the pitch at the parallel strip-shaped conductors which are arranged, such that the via-holes connect said power supply/ground layer and said at lease one power/ground layer.

Claim 16

The multilayer wiring structure according to claim 13, wherein the wires of said signal wiring layer includes: at least one wire which is arranged opposite to one of the parallel strip-shaped conductors of said power supply/ground layer; and at least one wire which is arranged opposite to a space between adjacent two of the parallel strip-shaped conductors of said power supply/ground layers, and the wires of said at least one signal wiring layer includes: at least one wire which is arranged opposite to one of the parallel strip-shaped conductors of said at least one power supply/ground layer; and at least one wire which is arranged opposite to a space between adjacent two of the parallel strip-shaped conductors of said at least one power supply/ground layer.

Claim 17

The multilayer wiring structure according to claim 13, wherein the parallel strip-shaped conductors of said each of said power supply/ground layer and said at least one power supply conductor layer are constituted by power supply conductors and ground conductors, the power supply conductors and the ground conductors being alternately arranged.