US5629888A
Expired / Lapsed
US
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Semiconductor memory device and method of operation thereof
Assignee: PS4 Luxco SARL
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Filing: 1994-01-18
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Granted: 1997-05-13
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Expires: 2014-01-18
Abstract
Abstract A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.
Inventors
- 👤 Ryuichi Saito
- 👤 Hidekatsu Onose
- 👤 Yutaka Kobayashi
- 👤 Michio Ohue
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 20:12
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/22; G11C11/56; G11C11/5657; H; H10; H10B; H10B12/00; H10B12/30; H10B53/00; G11C16/00; G11C16/02; G11C16/06; G11C16/08; G11C8/00; G11C8/14
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
133 words
A semiconductor memory having: a) at least one memory cell having at least one ferroelectric capacitive element, said at least one ferroelectric capacitive element having first and second polarization states and being switchable therebetween by respective first and second voltages; b) a control circuit for: applying said first voltage across said ferroelectric capacitive element, thereby to cause said ferroelectric capacitive element to be in said first state; and applying a further voltage across said ferroelectric capacitive element so as to cause said ferroelectric capacitive element to change from said first state to a further state said further voltage being different from that corresponding to said second state; and c) measuring means for measuring the change of polarization across said at least one ferroelectric capacitive element between said first state and said further state.
Claim 2
Dependent Claim
133 words
A semiconductor memory having: a) at least one memory cell having at least one ferroelectric capacitive element, said at least one ferroelectric capacitive element having first and second polarization states and being switchable therebetween by respective first and second voltages; b) a control circuit for: applying said first voltage across said ferroelectric capacitive element, thereby to cause said ferroelectric capacitive element to be in said first state; and applying a further voltage across said ferroelectric capacitive element so as to cause said ferroelectric capacitive element to change from said first state to a further state said further voltage being different from that corresponding to said second state; and c) measuring means for measuring the change of polarization across said at least one ferroelectric capacitive element between said first state and said further state.
Claim 3
Dependent Claim
43 words
A memory device according to claim 1, wherein said at least one memory cell has a switching element having first second and control terminals, and said first terminal of said switching element is connected to a first terminal of said ferroelectric capacitive element.
Claim 4
Dependent Claim
115 words
A memory device according to claim 1, having a further memory cell having at least one further ferroelectric capacitive element; wherein said control circuit is arranged to apply a predetermined voltage across said at least one further ferroelectric capacitive element, thereby to cause said at least one further ferroelectric capacitive element to be in a predetermined state, and apply said further voltage across said further ferroelectric capacitive element; and wherein said measuring means is arranged to compare said change in polarization of said at least one ferroelectric capacitive element and said change in polarization of said at least one further ferroelectric capacitive element, thereby to determine whether said first state corresponds to said predetermined state.
Claim 5
Dependent Claim
29 words
A memory device according to claim 1, having a plurality of said ferroelectric capacitive elements, and said plurality of ferroelectric capacitive elements have a first terminal electrically connected together.
Claim 6
Dependent Claim
36 words
A memory device according to claim 4, wherein said plurality of ferroelectric capacitive elements have a second terminal electrically connected together and at least two of said plurality of ferroelectric capacitive elements have different ferroelectric properties.
Claim 7
Dependent Claim
42 words
A memory device according to claim 1, wherein said at least one memory cell has at least one further capacitive element being other than a ferroelectric capacitive element and said at least one ferroelectric capacitive element have a terminal electrically connected together.
Claim 8
Dependent Claim
59 words
A memory device according to claim 1, wherein said at least one memory cell has means for establishing electric fields in a predetermined direction across said at least one ferroelectric capacitive element in response to said first and further voltages, and the polarization axis of said at least one ferroelectric capacitive element is substantially parallel to said predetermined direction.
Claim 9
Dependent Claim
43 words
A memory device according to claim 1, wherein said at least one ferroelectric capacitive element has: a body of ferroelectric material having opposite surfaces; an insulation layer on each of said opposite surfaces; and a conductive layer on each of said insulation layers.
Claim 10
Dependent Claim
83 words
A semiconductor memory device having at least one memory cell, said at least one memory cell comprising: at least one switching element having first, second and control terminals; and a plurality of capacitive elements each having a first terminal connected to said first terminal of said switching element; wherein at least one of said plurality of capacitive elements is a ferroelectric capacitive element, and at least another of said plurality of capacitive elements is a capacitive element other than a ferroelectric capacitive element.
Claim 11
Dependent Claim
83 words
A semiconductor memory device having at least one memory cell, said at least one memory cell comprising: at least one switching element having first, second and control terminals; and a plurality of capacitive elements each having a first terminal connected to said first terminal of said switching element; wherein at least one of said plurality of capacitive elements is a ferroelectric capacitive element, and at least another of said plurality of capacitive elements is a capacitive element other than a ferroelectric capacitive element.
Claim 12
Dependent Claim
39 words
A memory device according to claim 9, wherein the capacitance of said ferroelectric capacitive element is greater than the capacitance of said at least another of said plurality of capacitive elements which is other than a ferroelectric capacitive element.
Claim 13
Dependent Claim
22 words
A memory device according to claim 9, wherein more than one of said plurality of capacitive elements is a ferroelectric capacitive element.
Claim 14
Dependent Claim
203 words
A semiconductor memory device comprising: a) at least one memory cell having at least one switching element, said at least one switching element having first, second and control terminals, and a plurality of capacitive elements, each of said plurality of capacitive elements having a first terminal connected to said first terminal of said switching element, and at least two of said plurality of capacitive element being ferroelectric capacitive elements; and b) control means for: establishing respective first operating states, for each of said capacitive elements, said respective first operating states of said at least two of said plurality of capacitive elements corresponding to a respective first polarization; and selectively applying a first voltage to a second terminal of a selected at least one of said capacitive elements and a second voltage, different from said first voltage, to a second terminal of said capacitive elements other than said selected at least one of said capacitive elements; whereby said control means is arranged to change said selected one of said capacitive elements to a second operating state corresponding to a second polarization, and to hold said capacitive elements other than said selected at least one of said capacitive elements in said respective first operating state.
Claim 15
Dependent Claim
203 words
A semiconductor memory device comprising: a) at least one memory cell having at least one switching element, said at least one switching element having first, second and control terminals, and a plurality of capacitive elements, each of said plurality of capacitive elements having a first terminal connected to said first terminal of said switching element, and at least two of said plurality of capacitive element being ferroelectric capacitive elements; and b) control means for: establishing respective first operating states, for each of said capacitive elements, said respective first operating states of said at least two of said plurality of capacitive elements corresponding to a respective first polarization; and selectively applying a first voltage to a second terminal of a selected at least one of said capacitive elements and a second voltage, different from said first voltage, to a second terminal of said capacitive elements other than said selected at least one of said capacitive elements; whereby said control means is arranged to change said selected one of said capacitive elements to a second operating state corresponding to a second polarization, and to hold said capacitive elements other than said selected at least one of said capacitive elements in said respective first operating state.
Claim 16
Dependent Claim
29 words
A memory device according to claim 12, wherein more than one of said plurality of capacitive elements of said at least one memory cell is a ferroelectric capacitive element.
Claim 17
Dependent Claim
21 words
A memory device according to claim 13, wherein said ferroelectric capacitive elements of said at least one memory cell are stacked.
Claim 18
Dependent Claim
25 words
A memory device according to claim 14, wherein said ferroelectric capacitive elements are stacked above said switching element of said at least one memory cell.
Claim 19
Dependent Claim
104 words
A memory device according to claim 12 having a plurality of said memory cells, wherein a second terminal of a first one of said plurality of capacitive elements of a first one of said memory cells is connected to a second terminal of a first one of said plurality of capacitive elements of a second one of said memory cells, and a second terminal of said first one of said plurality of capacitive elements of said first one of said memory cells is connected to a second terminal of one of said plurality of capacitive elements of a third one of said memory cells.
Claim 20
Dependent Claim
64 words
A semiconductor memory device having at least one memory cell; said at least one memory cell having at least one capacitive element and means for establishing an electric field in a predetermined direction across said capacitive element; wherein the capacitive element of each said memory cell has a ferroelectric body, and the polarization axis of said body is substantially parallel to said predetermined direction.
Claim 21
Dependent Claim
64 words
A semiconductor memory device having at least one memory cell; said at least one memory cell having at least one capacitive element and means for establishing an electric field in a predetermined direction across said capacitive element; wherein the capacitive element of each said memory cell has a ferroelectric body, and the polarization axis of said body is substantially parallel to said predetermined direction.
Claim 22
Dependent Claim
31 words
A semiconductor memory device according to claim 17 wherein said ferroelectric body comprises a plurality of ferroelectric crystals and each of said crystals has a surface parallel to said polarization axis.
Claim 23
Dependent Claim
74 words
A semiconductor memory device having at least one memory cell; said at least one memory cell having at least one capacitive element and means for establishing an electric field in a predetermined direction across said capacitive element; wherein said at least one capacitive element of each said memory cell has a ferroelectric body for which at least 80% of thereof has a polarization axis within 5% of said predetermined direction of said electric field.
Claim 24
Dependent Claim
74 words
A semiconductor memory device having at least one memory cell; said at least one memory cell having at least one capacitive element and means for establishing an electric field in a predetermined direction across said capacitive element; wherein said at least one capacitive element of each said memory cell has a ferroelectric body for which at least 80% of thereof has a polarization axis within 5% of said predetermined direction of said electric field.
Claim 25
Dependent Claim
81 words
A semiconductor memory device having at least one memory cell; said at least one memory cell having at least one capacitive element and means for establishing an electric field in a predetermined direction across said capacitive element; wherein the capacitive element of each said memory cell has a ferroelectric body, said ferroelectric body has a plurality of ferroelectric crystals each having a polarization axis and each of said crystals has a surface parallel to the polarization axis of the corresponding crystal.
Claim 26
Dependent Claim
81 words
A semiconductor memory device having at least one memory cell; said at least one memory cell having at least one capacitive element and means for establishing an electric field in a predetermined direction across said capacitive element; wherein the capacitive element of each said memory cell has a ferroelectric body, said ferroelectric body has a plurality of ferroelectric crystals each having a polarization axis and each of said crystals has a surface parallel to the polarization axis of the corresponding crystal.
Claim 27
Dependent Claim
43 words
A semiconductor memory device having at least one memory cell, each memory cell having at least one ferroelectric capacitive element, wherein said ferroelectric capacitive element has the polarization axes thereof arranged randomly such that the ferroelectric capacitive element has an isotropic dielectric characteristic.
Claim 28
Dependent Claim
43 words
A semiconductor memory device having at least one memory cell, each memory cell having at least one ferroelectric capacitive element, wherein said ferroelectric capacitive element has the polarization axes thereof arranged randomly such that the ferroelectric capacitive element has an isotropic dielectric characteristic.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-05-12 | 2000-11-11 | 2001-05-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-05-12 | 2004-11-11 | 2005-05-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-05-12 | 2008-11-11 | 2009-05-13 | $7700.00 | Window Closed / Lapsed |