Current generator circuit for generating substantially constant current

Claim 2

A current generator circuit for generating a substantially constant reference current which includes a bandgap reference circuit comprising: an operational amplifier having first and second inputs receiving signals respectively from intermediate nodes of first and second resistive chains, each resistive chain having in series a first terminal connected to a first potential, a unidirectional current control element, at least one resistive element and a second terminal, the second terminals of the resistive chains being connected at a junction node; the operational amplifier having an output for supplying an output signal to a control terminal of an output device which has a controllable path connected between a power supply voltage and said junction node of said first and second resistive chains, the current generator circuit further comprising: a current setting device which receives at a control terminal thereof the output signal of the operational amplifier and which has its controllable path connected between said power supply voltage and a current supply terminal to provide at said current supply terminal a substantially constant reference current.

Claim 3

A current generator circuit according to claim 1 wherein the current supply terminal is connected to a first current mirror transistor and wherein the circuit further comprises a second current mirror transistor which is connected to said first current mirror transistor to take a current varying with said substantially constant reference current.

Claim 4

A current generator circuit according to claim 1 or 2 wherein each unidirectional current control element is a diode connected bipolar transistor.

Claim 5

A current generator circuit according to claim 3 wherein said resistive elements are selected to have a variation in resistance with temperature matched to the variation in base emitter voltage of the transistors in each resistive chain to maintain a feedback current supplied by said output device to said junction node substantially constant.

Claim 6

A current generator circuit according to claim 1 wherein the operational amplifier includes amplification circuitry supplied by a reference current derived from the output signal of the operational amplifier.

Claim 7

A current generator circuit according to claim 5 wherein the operational amplifier further includes start-up circuitry which also receives as its reference current a current derived from the output signal of said operational amplifier.

Claim 8

A current generator circuit according to claim 1 wherein said at least one resistive element in each resistive chain is formed as an n-well diffusion.

Claim 9

A current generator circuit according to claims 1 wherein said resistive elements are formed as p-well diffusions.

Claim 10

A current generator circuit according to claim 1 wherein the bandgap reference circuit provides a reference voltage at said junction node.

Claim 11

A current generator circuit for generating a substantially constant reference current which includes a bandgap reference circuit comprising: an operational amplifier having first and second inputs receiving signals respectively from intermediate nodes of first and second resistive chains, each resistive chain having in series a first terminal connected to a first potential, a unidirectional current control element, at least one resistive element and a second terminal, the second terminals of the resistive chains being connected at a junction node; the operational amplifier having an output for supplying an output signal to a control terminal of an output device which has a controllable path connected between a power supply voltage and said junction node of said first and second resistive chains, the current generator circuit further comprising: a current setting device which receives at a control terminal thereof the output signal of the operational amplifier and which has its controllable path connected between said power supply voltage and a current supply terminal to provide at said current supply terminal a substantially constant reference current; wherein the resistive elements are selected to have a variation in resistance with temperature matched to the variation in base emitter voltage of the transistors in each resistive chain to maintain a feedback current supplied by said output device to said junction node substantially constant, said resistive elements being formed as n-well diffusions.

Claim 12

A current generator circuit for generating a substantially constant reference current which includes a bandgap reference circuit comprising: an operational amplifier having first and second inputs receiving signals respectively from intermediate nodes of first and second resistive chains, each resistive chain having in series a first terminal connected to a first potential, a unidirectional current control element, at least one resistive element and a second terminal, the second terminals of the resistive chains being connected at a junction node; the operational amplifier having an output for supplying an output signal to a control terminal of an output device which has a controllable path connected between a power supply voltage and said junction node of said first and second resistive chains, the current generator circuit further comprising: a current setting device which receives at a control terminal thereof the output signal of the operational amplifier and which has its controllable path connected between said power supply voltage and a current supply terminal to provide at said current supply terminal a substantially constant reference current; wherein the resistive elements are selected to have a variation in resistance with temperature matched to the variation in base emitter voltage of the transistors in each resistive chain to maintain a feedback current supplied by said output device to said junction node substantially constant, said resistive elements being formed as n-well diffusions.

Claim 13

A current generator circuit for generating a substantially constant reference current which includes a bandgap reference circuit comprising: an operational amplifier having first and second inputs receiving signals respectively from intermediate nodes of first and second resistive chains, each resistive chain having in series a first terminal connected to a first potential, a unidirectional current control element, at least one resistive element and a second terminal, the second terminals of the resistive chains being connected at a junction node; the operational amplifier having an output for supplying an output signal to a control terminal of an output device which has a controllable path connected between a power supply voltage and said junction node of said first and second resistive chains, the current generator circuit further comprising: a current setting device which receives at a control terminal thereof the output signal of the operational amplifier and which has its controllable path connected between said power supply voltage and a current supply terminal to provide at said current supply terminal a substantially constant reference current; wherein the resistive elements are selected to have a variation in resistance with temperature matched to the variation in base emitter voltage of the transistors in each resistive chain to maintain a feedback current supplied by said output device to said junction node substantially constant, said resistive elements being formed as p-well diffusions.

Claim 14

A current generator circuit for generating a substantially constant reference current which includes a bandgap reference circuit comprising: an operational amplifier having first and second inputs receiving signals respectively from intermediate nodes of first and second resistive chains, each resistive chain having in series a first terminal connected to a first potential, a unidirectional current control element, at least one resistive element and a second terminal, the second terminals of the resistive chains being connected at a junction node; the operational amplifier having an output for supplying an output signal to a control terminal of an output device which has a controllable path connected between a power supply voltage and said junction node of said first and second resistive chains, the current generator circuit further comprising: a current setting device which receives at a control terminal thereof the output signal of the operational amplifier and which has its controllable path connected between said power supply voltage and a current supply terminal to provide at said current supply terminal a substantially constant reference current; wherein the resistive elements are selected to have a variation in resistance with temperature matched to the variation in base emitter voltage of the transistors in each resistive chain to maintain a feedback current supplied by said output device to said junction node substantially constant, said resistive elements being formed as p-well diffusions.

Claim 15

An integrated circuit comprising: an array of reprogrammable memory cells; decode circuitry associated with said array; and a current generator circuit for generating a substantially constant reference current which includes a bandgap reference circuit comprising: an operational amplifier having first and second inputs receiving signals respectively from intermediate nodes of first and second resistive chains, each resistive chain having in series a first terminal connected to a first potential, a unidirectional current control element, at least one resistive element and a second terminal, the second terminals of the resistive chains being connected at a junction node; the operational amplifier having an output for supplying an output signal to a control terminal of an output device which has a controllable path connected between a power supply voltage and said junction node of said first and second resistive chains, the current generator circuit further comprising: a current setting device which receives at a control terminal thereof the output signal of the operational amplifier and which has its controllable path connected between said power supply voltage and a current supply terminal to provide at said current supply terminal a substantially constant reference current.

Claim 16

An integrated circuit comprising: an array of reprogrammable memory cells; decode circuitry associated with said array; and a current generator circuit for generating a substantially constant reference current which includes a bandgap reference circuit comprising: an operational amplifier having first and second inputs receiving signals respectively from intermediate nodes of first and second resistive chains, each resistive chain having in series a first terminal connected to a first potential, a unidirectional current control element, at least one resistive element and a second terminal, the second terminals of the resistive chains being connected at a junction node; the operational amplifier having an output for supplying an output signal to a control terminal of an output device which has a controllable path connected between a power supply voltage and said junction node of said first and second resistive chains, the current generator circuit further comprising: a current setting device which receives at a control terminal thereof the output signal of the operational amplifier and which has its controllable path connected between said power supply voltage and a current supply terminal to provide at said current supply terminal a substantially constant reference current.

Claim 17

An integrated circuit according to claim 12 wherein the current supply terminal of the current generator circuit is connected to a first current mirror transistor and wherein the circuit further comprises a second current mirror transistor which is connected to said first current mirror transistor to take a current varying with said substantially constant reference current.

Claim 18

An integrated circuit according to claim 12 or 13 wherein said reprogrammable memory cells are EPROM cells.

Claim 19

An integrated circuit according to claims 12 or 13 wherein said resistive elements are selected to have a variation in resistance with temperature matched to the variation in base emitter voltage of the transistors in each resistive chain to maintain a feedback current supplied by said output device and said junction node substantially constant.