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US5625825A
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Random number generating apparatus for an interface unit of a carrier sense with multiple access and collision detect (CSMA/CD) ethernet data network
Assignee: LSI Corp
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Filing: 1993-10-21
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Granted: 1997-04-29
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Expires: 2013-10-21
Abstract
Abstract A random number generating apparatus for an interface unit of a Carrier Sense with Multiple Access and Collision Detect (CSMA/CD) Ethernet data network. The interface unit includes a transmit backoff unit for implementing a backoff algorithm in response to a network collision signal and a random number. The apparatus comprises a dual mode random number generator and a multiplexer for switching the random number generator between modes in accordance with the serial address bits of a data packet being processed by the interface unit. The random number generator includes a 25 stage linear feedback shift register. The multiplexer has two signal inputs connected to outputs of the 18th and 22nd stages of the shift register respectively, a switch input connected to receive the serial address bits and an output connected in circuit to an input of the shift register.
Inventors
- 👤 Michael D. Rostoker
- 👤 D. Tony Stelliga
- 👤 Dave Paolino
- 👤 Willem A. H. Engelse
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 04:50
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/28; H04L12/40; H04L12/407; H04L12/413; G; G06; G06F; G06F7/00; G06F7/58; G06F7/582; G06F7/584; H04L12/46; H04L12/4604; H04L12/4608; H04Q; H04Q11/00; H04Q11/04; H04Q11/0428; H04Q11/0478; G06F2207/00; G06F2207/58; G06F2207/581; G06F2207/583; H04L12/54; H04L12/56; H04L12/5601; H04L2012/5614; H04L2012/5615; H04L2012/5616; H04L2012/5618; H04L2012/5638; H04L2012/5646; H04L2012/5652; H04L2012/5653
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
162 words
A random number generating apparatus for an interface unit of a Carrier Sense with Multiple Access and Collision Detect (CSMA/CD) data network, said interface unit including a transmit backoff unit for implementing a backoff algorithm in response to a network collision signal ann a random number, said apparatus comprising: a dual mode random number generator; and a multiplexer for switching the random number generator between modes in accordance with an address of a data packet being processed by the interface unit, in which: the random number generator comprises a linear feedback shift register; the shift register has a plurality of stages; the multiplexer has two signal inputs connected to outputs of two of said stages respectively, a switch input connected to receive said address and an output connected in circuit to an input of the shift register; the shift register has 25 stages; and said signal inputs of the multiplexer are connected to stages 18 and 22 of the shift register respectively.
Claim 2
Dependent Claim
162 words
A random number generating apparatus for an interface unit of a Carrier Sense with Multiple Access and Collision Detect (CSMA/CD) data network, said interface unit including a transmit backoff unit for implementing a backoff algorithm in response to a network collision signal ann a random number, said apparatus comprising: a dual mode random number generator; and a multiplexer for switching the random number generator between modes in accordance with an address of a data packet being processed by the interface unit, in which: the random number generator comprises a linear feedback shift register; the shift register has a plurality of stages; the multiplexer has two signal inputs connected to outputs of two of said stages respectively, a switch input connected to receive said address and an output connected in circuit to an input of the shift register; the shift register has 25 stages; and said signal inputs of the multiplexer are connected to stages 18 and 22 of the shift register respectively.
Claim 3
Dependent Claim
193 words
A single-chip data network controller, comprising: a plurality of network interface units; and a clock unit for clocking the network interface units in synchronism with each other, in which: each interface unit is configured for interfacing in accordance with the Carrier Sense with Multiple Access and Collision Detect (CSMA/CD) protocol, and includes a transmit backoff unit for implementing a backoff algorithm in response to a network collision signal and a random number; each interface unit comprises a random number generating apparatus including: a dual mode random number generator; and a multiplexer for switching the random number generator between modes in accordance with an address of a data packet being processed by the interface unit; the random number generator comprises a linear feedback shift register; the shift register has a plurality of stages; the multiplexer has two signal inputs connected to outputs of two of said stages respectively, a switch input connected to receive said address and an output connected in circuit to an input of the shift register; the shift register has 25 stages; and said signal inputs of the multiplexer are connected to stages 18 and 22 of the shift register respectively.
Claim 4
Dependent Claim
193 words
A single-chip data network controller, comprising: a plurality of network interface units; and a clock unit for clocking the network interface units in synchronism with each other, in which: each interface unit is configured for interfacing in accordance with the Carrier Sense with Multiple Access and Collision Detect (CSMA/CD) protocol, and includes a transmit backoff unit for implementing a backoff algorithm in response to a network collision signal and a random number; each interface unit comprises a random number generating apparatus including: a dual mode random number generator; and a multiplexer for switching the random number generator between modes in accordance with an address of a data packet being processed by the interface unit; the random number generator comprises a linear feedback shift register; the shift register has a plurality of stages; the multiplexer has two signal inputs connected to outputs of two of said stages respectively, a switch input connected to receive said address and an output connected in circuit to an input of the shift register; the shift register has 25 stages; and said signal inputs of the multiplexer are connected to stages 18 and 22 of the shift register respectively.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-04-28 | 2000-10-28 | 2001-04-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-04-28 | 2004-10-28 | 2005-04-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-04-28 | 2008-10-28 | 2009-04-29 | $7700.00 | Window Closed / Lapsed |