US5621772A
Expired / Lapsed
US
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Hysteretic synchronization system for MPEG audio frame decoder
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1995-01-20
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Granted: 1997-04-15
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Expires: 2015-01-20
Abstract
Abstract An audio decoder decodes audio frames included in a Motion Picture Experts Group (MPEG) bitstream for presentation or playing. Each audio frame includes a synchronization code and a frame header, followed by audio data. The synchronization codes are detected, and it is determined that the decoder is synchronized to the bitstream after a first predetermined number, for example three, of successive valid audio frames have been detected. It is similarly determined that the decoder is unsynchronized to the bitstream after a second predetermined number, which can also be three, of successive invalid audio frames have been detected. Each and every frame is determined to be valid if its header parameters are valid, it passes the CRC error check (optional), no syntax errors are detected and its frame length (interval) is as expected. The proper frame interval can be determined from the information in the header following each valid synchronization code, or can be determined by counting the number of bits between the first and second valid synchronization codes. The decoder can be muted while out of synchronization to minimize distortion of the audio presentation.
Inventors
- 👤 Greg Maturi
- 👤 Gregg Dierke
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 21:45
CPC Classifications
H; H04; H04N; H04N21/00; H04N21/40; H04N21/43; H04N21/439; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0602; H04J3/0605; H04J3/0608; H04N21/20; H04N21/23; H04N21/236; H04N21/2368; H04N21/4302; H04N21/4305; H04N21/434; H04N21/4341; G; G10; G10L; G10L19/00; G10L19/02; H04L; H04L7/00; H04L7/04; H04L7/08
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
215 words
A synchronization system for synchronizing a data processing unit to an input data bitstream including synchronization codes that are successively spaced from each other by a predetermined interval, and data for processing by the processing unit disposed between the synchronization codes, comprising: synchronization code detecting means for detecting said synchronization codes; interval sensing means for sensing intervals between successive synchronization codes; comparator means for comparing said intervals with said predetermined interval; and control means for determining that the system is synchronized to the bitstream after the comparator means has detected a first predetermined number of said intervals corresponding to successive synchronization codes that are equal to said predetermined interval; and determining that the system is unsynchronized to the bitstream after the comparator means has detected a second predetermined number of said intervals corresponding to successive synchronization codes that are not equal to said predetermined interval, in which: the bitstream further comprises a data header including information from which said predetermined interval can be calculated; the system further comprises header sensor means for sensing said header and calculating said predetermined interval from said information; said information comprises a bitrate and a sampling frequency; and the header sensor means calculates said interval as: N=K(bitrate/sampling frequency) where N is said predetermined interval and K is a predetermined constant.
Claim 2
Dependent Claim
215 words
A synchronization system for synchronizing a data processing unit to an input data bitstream including synchronization codes that are successively spaced from each other by a predetermined interval, and data for processing by the processing unit disposed between the synchronization codes, comprising: synchronization code detecting means for detecting said synchronization codes; interval sensing means for sensing intervals between successive synchronization codes; comparator means for comparing said intervals with said predetermined interval; and control means for determining that the system is synchronized to the bitstream after the comparator means has detected a first predetermined number of said intervals corresponding to successive synchronization codes that are equal to said predetermined interval; and determining that the system is unsynchronized to the bitstream after the comparator means has detected a second predetermined number of said intervals corresponding to successive synchronization codes that are not equal to said predetermined interval, in which: the bitstream further comprises a data header including information from which said predetermined interval can be calculated; the system further comprises header sensor means for sensing said header and calculating said predetermined interval from said information; said information comprises a bitrate and a sampling frequency; and the header sensor means calculates said interval as: N=K(bitrate/sampling frequency) where N is said predetermined interval and K is a predetermined constant.
Claim 3
Dependent Claim
195 words
A synchronization system for synchronizing a data processing unit to an input data bitstream including synchronization codes that are successively spaced from each other by a predetermined interval, and data for processing by the processing unit disposed between the synchronization codes, comprising: synchronization code detecting means for detecting said synchronization codes; interval sensing means for sensing intervals between successive synchronization codes; comparator means for comparing said intervals with said predetermined interval; and control means for determining that the system is synchronized to the bitstream after the comparator means has detected a first predetermined number of said intervals corresponding to successive synchronization codes that are equal to said predetermined intervail and determining that the system is unsynchronized to the bitstream after the comparator means has detected a second predetermined number of said intervals corresponding to successive synchronization codes that are not equal to said predetermined interval, in which: the bitstream further comprises a data header including information from which said predetermined interval can be calculated; the system further comprises header sensor means for sensing said header and calculating said predetermined interval from said information; and the bitstream comprises a data header following each synchronization code respectively.
Claim 4
Dependent Claim
195 words
A synchronization system for synchronizing a data processing unit to an input data bitstream including synchronization codes that are successively spaced from each other by a predetermined interval, and data for processing by the processing unit disposed between the synchronization codes, comprising: synchronization code detecting means for detecting said synchronization codes; interval sensing means for sensing intervals between successive synchronization codes; comparator means for comparing said intervals with said predetermined interval; and control means for determining that the system is synchronized to the bitstream after the comparator means has detected a first predetermined number of said intervals corresponding to successive synchronization codes that are equal to said predetermined intervail and determining that the system is unsynchronized to the bitstream after the comparator means has detected a second predetermined number of said intervals corresponding to successive synchronization codes that are not equal to said predetermined interval, in which: the bitstream further comprises a data header including information from which said predetermined interval can be calculated; the system further comprises header sensor means for sensing said header and calculating said predetermined interval from said information; and the bitstream comprises a data header following each synchronization code respectively.
Claim 5
Dependent Claim
19 words
A system as in claim 2, in which said first and second predetermined numbers are each larger than one.
Claim 6
Dependent Claim
16 words
A system as in claim 2, in which said first and second predetermined numbers are equal.
Claim 7
Dependent Claim
27 words
A system as in claim 2, in which: said data comprises frames of encoded audio data; and the processing unit comprises a decoder for decoding said frames.
Claim 8
Dependent Claim
29 words
A system as in claim 5, in which the control means further inhibits the decoder from outputting frames of decoded data while the system is unsynchronized to said bitstream.
Claim 9
Dependent Claim
27 words
A system as in claim 5, in which the control means further inhibits the decoder from decoding said frames while the system is unsynchronized to said bitstream.
Claim 10
Dependent Claim
61 words
A system as in claim 2, in which: header sensor means further sense and detect if said headers have normal or abnormal syntax; and the control means further determines that the system is synchronized to the bitstream only if the header sensor means detects that said syntax of a header following a first one of said successive synchronization codes is normal.
Claim 11
Dependent Claim
53 words
A system as in claim 2, in which: said bitstream comprises bits of data such that said predetermined interval corresponds to a number of said bits; and the system further comprises counter means for counting said bits between successive synchronization codes to determine said number of said bits and said corresponding predetermined interval.
Claim 12
Independent Claim
206 words
A method for synchronizing a data processing system to an input bitstream including synchronization codes that are successively spaced from each other by a predetermined interval, and data for processing by the processing system disposed between the synchronization codes, comprising the steps of: (a) detecting said synchronization codes; (b) sensing intervals between successive synchronization codes; (c) comparing said intervals with said predetermined interval; (d) determining that the system is synchronized to the bitstream after a first predetermined number of said intervals corresponding to successive synchronization codes that are equal to said predetermined interval have been detected; and (e) determining that the system is unsynchronized to the bitstream after a second predetermined number of said intervals corresponding to successive synchronization codes that are not equal to said predetermined interval have been detected, in which: the bitstream further comprises a data header including information from which said predetermined interval can be calculated; the method further comprises the step, performed between steps (a) and (c), of: (f) sensing said header and calculating said predetermined interval from said information; said information comprises a bitrate and a sampling frequency; and step (f) comprises calculating said interval as: N=K(bitrate/sampling frequency) where N is said predetermined interval and K is a predetermined constant.
Claim 13
Independent Claim
206 words
A method for synchronizing a data processing system to an input bitstream including synchronization codes that are successively spaced from each other by a predetermined interval, and data for processing by the processing system disposed between the synchronization codes, comprising the steps of: (a) detecting said synchronization codes; (b) sensing intervals between successive synchronization codes; (c) comparing said intervals with said predetermined interval; (d) determining that the system is synchronized to the bitstream after a first predetermined number of said intervals corresponding to successive synchronization codes that are equal to said predetermined interval have been detected; and (e) determining that the system is unsynchronized to the bitstream after a second predetermined number of said intervals corresponding to successive synchronization codes that are not equal to said predetermined interval have been detected, in which: the bitstream further comprises a data header including information from which said predetermined interval can be calculated; the method further comprises the step, performed between steps (a) and (c), of: (f) sensing said header and calculating said predetermined interval from said information; said information comprises a bitrate and a sampling frequency; and step (f) comprises calculating said interval as: N=K(bitrate/sampling frequency) where N is said predetermined interval and K is a predetermined constant.
Claim 14
Independent Claim
186 words
A method for synchronizing a data processing system to an input bitstream including synchronization codes that are successively spaced from each other by the predetermined interval, and data for processing by the processing system disposed between the synchronization codes, comprising the steps of: (a) detecting said synchronization codes; (b) sensing intervals between successive synchronization codes; (c) comparing said intervals with said predetermined interval; (d) determining that the system is synchronized to the bitstream after a first predetermined number of said intervals corresponding to successive synchronization codes that are equal to said predetermined interval have been detected; and (e) determining that the system is unsynchronized to the bitstream after a second predetermined number of said intervals corresponding to successive synchronization codes that are not equal to said predetermined interval have been detected, in which: the bitstream further comprises a data header including information from which said predetermined interval can be calculated; the method further comprises the steps performed between steps (a) and (c), of: (f) sensing said header and calculating said predetermined interval from said information; the bitstream comprises a data header following each synchronization code respectively.
Claim 15
Independent Claim
186 words
A method for synchronizing a data processing system to an input bitstream including synchronization codes that are successively spaced from each other by the predetermined interval, and data for processing by the processing system disposed between the synchronization codes, comprising the steps of: (a) detecting said synchronization codes; (b) sensing intervals between successive synchronization codes; (c) comparing said intervals with said predetermined interval; (d) determining that the system is synchronized to the bitstream after a first predetermined number of said intervals corresponding to successive synchronization codes that are equal to said predetermined interval have been detected; and (e) determining that the system is unsynchronized to the bitstream after a second predetermined number of said intervals corresponding to successive synchronization codes that are not equal to said predetermined interval have been detected, in which: the bitstream further comprises a data header including information from which said predetermined interval can be calculated; the method further comprises the steps performed between steps (a) and (c), of: (f) sensing said header and calculating said predetermined interval from said information; the bitstream comprises a data header following each synchronization code respectively.
Claim 16
Dependent Claim
19 words
A method as in claim 11, in which said first and second predetermined numbers are each larger than one.
Claim 17
Dependent Claim
16 words
A method as in claim 11, in which said first and second predetermined numbers are equal.
Claim 18
Dependent Claim
36 words
A method as in claim 11, in which: said data comprises frames of encoded audio data; the system comprises a decoder for decoding said frames; and step (d) further comprises synchronizing the decoder to said frames.
Claim 19
Dependent Claim
29 words
A method as in claim 14, in which step (e) further comprises inhibiting the decoder from outputting frames of decoded data while the system is unsynchronized to said bitstream.
Claim 20
Dependent Claim
27 words
A method as in claim 14, in which step (e) further comprises inhibiting the decoder from decoding said frames while the system is unsynchronized to said bitstream.
Claim 21
Dependent Claim
75 words
A method as in claim 11, in which: the method further comprises the step, performed prior to step (c), of: (f) sensing and detecting if a syntax of a header following a first one of said successive synchronization codes is normal or abnormal; and step (d) further comprises determining that the system is synchronized to the bitstream only if said syntax of said header following said first one of said successive synchronization codes is normal.
Claim 22
Dependent Claim
59 words
A method as in claim 11, in which: said bitstream comprises bits of data such that said predetermined interval corresponds to a number of said bits; and the method further comprises the step, performed prior to step (c), of: (f) counting said bits between successive synchronization codes to determine said number of said bits and said corresponding predetermined interval.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-04-14 | 2000-10-14 | 2001-04-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-04-14 | 2004-10-14 | 2005-04-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-04-14 | 2008-10-14 | 2009-04-15 | $7700.00 | Window Closed / Lapsed |