Patent US5619053A successfully refreshed from Google Patents.
US5619053A
Expired / Lapsed
US
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Semiconductor device having an SOI structure
Assignee: Mitsubishi Electric Corp
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Filing: 1995-05-31
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Granted: 1997-04-08
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Expires: 2015-05-31
Abstract
Abstract Generation of parasitic transistor in active layer edge is prevented, in an NMOS region of a semiconductor layer (21) on an insulating film (20), boron ions are implanted by rotary oblique injection, using a nitride film (23) and a resist (253a) as mask. In the vicinity of a region for separating element by LOCOS method, that is, only in the edge region of the semiconductor layer (21) as the active layer of NMOS transistor, boron ions are implanted by about 3×10 13 /cm 2 . After LOCOS oxidation, the impurity concentration is heightened to such a level as the boron ions may not be sucked up into the oxide film.
Inventors
- 👤 Toshiaki Iwamatsu
- 👤 Yasuo Inoue
- 👤 Tadashi Nishimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 11:44
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/201
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
109 words
A semiconductor device comprising: (a) a semiconductor layer; (b) an insulating film formed beneath said semiconductor layer; (c) a high impurity concentration region extending from said insulating film, said high impurity concentration region having a higher impurity concentration than an impurity concentration of said semiconductor layer; and (d) a separating region for partitioning said semiconductor layer into activation regions; wherein said high impurity concentration region extends through an intersection of said insulating film and said activation regions and through an intersection of said separating region and said activation regions into said separating region and said high impurity concentration region is directly above said insulating film in said separating region.
Claim 2
Dependent Claim
109 words
A semiconductor device comprising: (a) a semiconductor layer; (b) an insulating film formed beneath said semiconductor layer; (c) a high impurity concentration region extending from said insulating film, said high impurity concentration region having a higher impurity concentration than an impurity concentration of said semiconductor layer; and (d) a separating region for partitioning said semiconductor layer into activation regions; wherein said high impurity concentration region extends through an intersection of said insulating film and said activation regions and through an intersection of said separating region and said activation regions into said separating region and said high impurity concentration region is directly above said insulating film in said separating region.
Claim 3
Dependent Claim
31 words
The semiconductor device according to claim 1 further comprising: an oxide film formed on a side of said separating region at an intersection of said separating region and said activation region.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-04-07 | 2000-10-07 | 2001-04-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-04-07 | 2004-10-07 | 2005-04-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-04-07 | 2008-10-07 | 2009-04-08 | $7700.00 | Window Closed / Lapsed |