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US5616931A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: NEC Corp
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Filing: 1995-08-24
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Granted: 1997-04-01
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Expires: 2015-08-24
Abstract
Abstract A semiconductor device has a plurality of chip regions each having semiconductor elements disposed therein and a plurality of electrode pads disposed on a surface thereof. The chip regions are separated and defined by scribing line regions. A plurality of dummy pads are disposed in the scribing line regions for use in positioning the electrode pads upon wafer probe test. The dummy pads are disposed in diagonally opposite positions across each of the chip regions one on each side of the each of the chip regions.
Inventors
- 👤 Toru Nakamura
- 👤 Keiji Toriyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 09:40
CPC Classifications
H; H10; H10P; H10P52/00; H10W; H10W46/00; H10W46/501
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
93 words
A semiconductor device comprising a plurality of chip regions each having semiconductor elements disposed therein and a plurality of electrode pads disposed on a surface thereof, said chip regions being separated by scribing line regions, and a plurality of dummy pads disposed in said scribing line regions for use in positioning said electrode pads during a wafer probe test, said dummy pads being smaller in size than said electrode pads and disposed in diagonally opposite positions across each of said chip regions one on each side of said each of the chip regions.
Claim 2
Dependent Claim
93 words
A semiconductor device comprising a plurality of chip regions each having semiconductor elements disposed therein and a plurality of electrode pads disposed on a surface thereof, said chip regions being separated by scribing line regions, and a plurality of dummy pads disposed in said scribing line regions for use in positioning said electrode pads during a wafer probe test, said dummy pads being smaller in size than said electrode pads and disposed in diagonally opposite positions across each of said chip regions one on each side of said each of the chip regions.
Claim 3
Dependent Claim
31 words
A semiconductor device according to claim 1, wherein said dummy pads include a plurality of dummy pads disposed in each of said diagonally opposite positions and electrically connected to each other.
Claim 4
Dependent Claim
19 words
A semiconductor device according to claim 1, wherein said plurality of dummy pads are electrically connected to each other.
Claim 5
Dependent Claim
23 words
A semiconductor device according to claim 1, wherein each of said dummy pads has a visual mark for differentiating from said electrode pads.
Claim 6
Dependent Claim
23 words
A semiconductor device according to claim 2, wherein each of said dummy pads has a visual mark for differentiating from said electrode pads.
Claim 7
Dependent Claim
23 words
A semiconductor device according to claim 3, wherein each of said dummy pads has a visual mark for differentiating from said electrode pads.
References Cited (Backward Citations)
JPS58106825A
Cited
JPS6231148A
Cited
JPS63128636A
Cited
JPS6473629A
Cited
JPH02143542A
Cited
JPH0637137A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-03-31 | 2000-09-30 | 2001-04-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-03-31 | 2004-09-30 | 2005-04-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-03-31 | 2008-09-30 | 2009-04-01 | $7700.00 | Window Closed / Lapsed |