Patent US5614745A successfully refreshed from Google Patents.
US5614745A
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US
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Contact structure between two conductive layers in semiconductor device and method of manufacturing the same
Assignee: Renesas Electronics Corp
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Filing: 1994-12-12
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Granted: 1997-03-25
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Expires: 2014-12-12
Abstract
Abstract A semiconductor device has a contact structure between two conductive layers capable of effectively preventing growth of an oxide film and diffusion of impurities between an impurity diffused region in a first one of the conductive layers and a polycrystalline silicon film (the second conductive layer) formed to be in contact with the impurity diffused region. The contact structure between the two conductive layers includes an n-type impurity diffused region 3 formed on a silicon substrate 1, an nitrided oxide film 4 formed to be in contact with the n-type impurity diffused region 3, and a polycrystalline silicon film 5a formed on the nitrided oxide film 4 and doped with impurities. Accordingly, growth of an oxide film and diffusion of impurities between the n-type impurity diffused region 3 and the polycrystalline silicon film 5a are also effectively prevented in a case where heat treatment at a high temperature is subsequently carried out in an oxygen atmosphere.
Inventors
- 👤 Kaoru Motonami
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 18:27
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/064; H10W20/066; H10W20/40; H10W20/41; H10W20/44; H10W20/4451; H10W20/45; H10W20/48; H10P14/00; H10P14/60; H10P14/65; H10P14/6516; H10P14/6518; H10P14/6524; H10P14/6526; H10P14/6536; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; H10P14/6927
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
57 words
A contact structure in a semiconductor device, comprising: first and second conductive layers in contact with each other through a nitrided oxide film of a thickness sufficient to enable direct tunnel current flow therethrough, wherein said thickness of said nitrided oxide film allows said first conductive layer and said second conductive layer to be in ohmic contact.
Claim 2
Dependent Claim
57 words
A contact structure in a semiconductor device, comprising: first and second conductive layers in contact with each other through a nitrided oxide film of a thickness sufficient to enable direct tunnel current flow therethrough, wherein said thickness of said nitrided oxide film allows said first conductive layer and said second conductive layer to be in ohmic contact.
Claim 3
Dependent Claim
103 words
In a semiconductor device, a contact structure comprising: a first conductive layer; an insulating layer provided on said first conductive layer, having a contact opening formed therethrough to expose a contact portion of said first conductive layer; a second conductive layer provided on said insulating layer, disposed to fill at least a portion of said contact opening; and a thin film of material inhibiting flow of impurities between said first and second conductive layers within said contact opening, said film being of a thickness sufficient to enable direct tunnel current flow therethrough and allow ohmic contact between said first and second conductive layers.
Claim 4
Dependent Claim
103 words
In a semiconductor device, a contact structure comprising: a first conductive layer; an insulating layer provided on said first conductive layer, having a contact opening formed therethrough to expose a contact portion of said first conductive layer; a second conductive layer provided on said insulating layer, disposed to fill at least a portion of said contact opening; and a thin film of material inhibiting flow of impurities between said first and second conductive layers within said contact opening, said film being of a thickness sufficient to enable direct tunnel current flow therethrough and allow ohmic contact between said first and second conductive layers.
Claim 5
Dependent Claim
104 words
A contact structure between two conductive layers in a semiconductor device, comprising: a first conductive layer; an insulating layer formed on said first conductive layer to have an opening on said first conductive layer; a nitrided oxide film formed to be in contact with at least said first conductive layer in said opening; and a second conductive layer formed on said nitrided oxide film to be in contact with said nitrided oxide film, wherein said nitrided oxide film has a thickness sufficient to enable direct tunnel current flow therethrough and allow said first conductive layer and second conductive layer to be in ohmic contact.
Claim 6
Dependent Claim
104 words
A contact structure between two conductive layers in a semiconductor device, comprising: a first conductive layer; an insulating layer formed on said first conductive layer to have an opening on said first conductive layer; a nitrided oxide film formed to be in contact with at least said first conductive layer in said opening; and a second conductive layer formed on said nitrided oxide film to be in contact with said nitrided oxide film, wherein said nitrided oxide film has a thickness sufficient to enable direct tunnel current flow therethrough and allow said first conductive layer and second conductive layer to be in ohmic contact.
Claim 7
Dependent Claim
19 words
The semiconductor device according to claim 2, wherein: said nitrided oxide film has a thickness not greater than 20Å.
Claim 8
Dependent Claim
27 words
The contact structure according to claim 1, wherein: said second conductive layer includes a polycrystalline silicon layer doped with impurities and formed on said nitrided oxide film.
Claim 9
Dependent Claim
22 words
The contact structure according to claim 5, wherein: said second conductive layer includes a silicide layer formed on said polycrystalline silicon layer.
Claim 10
Dependent Claim
25 words
The contact structure according to claim 1, wherein: said first conductive layer includes an impurity region formed on a main surface of a semiconductor substrate.
Claim 11
Dependent Claim
17 words
The contact structure according to claim 1, wherein: said first conductive layer includes a polycrystalline silicon layer.
Claim 12
Dependent Claim
18 words
The contact structure according to claim 1, wherein: said nitrided oxide film includes a silicon nitrided oxide film.
Claim 13
Dependent Claim
18 words
The contact structure according to claim 7, wherein: said silicon nitrided oxide film has a composition of ##EQU2##
Claim 14
Dependent Claim
162 words
A contact structure between two conductive layers in a semiconductor device, comprising: a first conductive layer; a first insulating layer formed on said first conductive layer to have a first opening on said first conductive layer; a first nitrided oxide film formed at least on said first conductive layer in said first opening; a second conductive layer formed on said first nitrided oxide film; a second insulating layer formed on said second conductive layer to have a second opening on said second conductive layer; a second nitrided oxide film formed at least on said second conductive layer in said second opening; and a third conductive layer formed on said second nitrided oxide film, wherein each of said first and second nitrided oxide films has a thickness sufficient to enable direct tunnel current flow therethrough and allow adjacent ones of the first, second and third conductive layers on and under said first and second nitrided oxide films to be in respective ohmic contact.
Claim 15
Dependent Claim
162 words
A contact structure between two conductive layers in a semiconductor device, comprising: a first conductive layer; a first insulating layer formed on said first conductive layer to have a first opening on said first conductive layer; a first nitrided oxide film formed at least on said first conductive layer in said first opening; a second conductive layer formed on said first nitrided oxide film; a second insulating layer formed on said second conductive layer to have a second opening on said second conductive layer; a second nitrided oxide film formed at least on said second conductive layer in said second opening; and a third conductive layer formed on said second nitrided oxide film, wherein each of said first and second nitrided oxide films has a thickness sufficient to enable direct tunnel current flow therethrough and allow adjacent ones of the first, second and third conductive layers on and under said first and second nitrided oxide films to be in respective ohmic contact.
Claim 16
Dependent Claim
171 words
A semiconductor memory device, comprising: a substrate having a major surface; a pair of impurity regions forming source and drain regions spaced apart from each other in said major surface of said substrate, a channel region being formed between said impurity regions; a gate electrode overlying said channel region through a gate insulating film; a charge storage capacitor electrode overlying one of said pair of impurity regions through a capacitor dielectric layer; an insulating film covering said substrate and containing a contact opening exposing the other one of said pair of impurity regions; and a bit line overlying said insulating film and in contact with said impurity region through said contact opening; said bit line comprising a conductive layer in electrical contact with said impurity region through a thin film of a material inhibiting flow of impurities between said conductive layer and said impurity region, said material being of a thickness sufficient to enable direct tunnel current flow therethrough and allow ohmic contact between said conductive layer and said impurity region.
Claim 17
Dependent Claim
171 words
A semiconductor memory device, comprising: a substrate having a major surface; a pair of impurity regions forming source and drain regions spaced apart from each other in said major surface of said substrate, a channel region being formed between said impurity regions; a gate electrode overlying said channel region through a gate insulating film; a charge storage capacitor electrode overlying one of said pair of impurity regions through a capacitor dielectric layer; an insulating film covering said substrate and containing a contact opening exposing the other one of said pair of impurity regions; and a bit line overlying said insulating film and in contact with said impurity region through said contact opening; said bit line comprising a conductive layer in electrical contact with said impurity region through a thin film of a material inhibiting flow of impurities between said conductive layer and said impurity region, said material being of a thickness sufficient to enable direct tunnel current flow therethrough and allow ohmic contact between said conductive layer and said impurity region.
Claim 18
Dependent Claim
17 words
The semiconductor memory device according to claim 12, wherein: said thin film is a nitrided oxide film.
Claim 19
Dependent Claim
169 words
A semiconductor memory device, comprising: a substrate having a major surface; a pair of impurity regions forming source and drain regions spaced apart from each other in said major surface of said substrate, a channel region being formed between said impurity regions; a gate electrode overlying said channel region through a gate insulating film; a charge storage capacitor electrode in contact with one of said pair of impurity regions; an insulating film covering said substrate and containing a contact opening exposing the other one of said pair of impurity regions; and a bit line overlying said insulating film and in contact with said impurity region through said contact opening; said charge capacitor electrode comprising a conductive layer in contact with said impurity region through a thin film of a material inhibiting flow of impurities between said conductive layer and said impurity region, said thin film being of a thickness sufficient to enable direct tunnel current flow therethrough and allow ohmic contact between said conductive layer and said impurity region.
Claim 20
Dependent Claim
169 words
A semiconductor memory device, comprising: a substrate having a major surface; a pair of impurity regions forming source and drain regions spaced apart from each other in said major surface of said substrate, a channel region being formed between said impurity regions; a gate electrode overlying said channel region through a gate insulating film; a charge storage capacitor electrode in contact with one of said pair of impurity regions; an insulating film covering said substrate and containing a contact opening exposing the other one of said pair of impurity regions; and a bit line overlying said insulating film and in contact with said impurity region through said contact opening; said charge capacitor electrode comprising a conductive layer in contact with said impurity region through a thin film of a material inhibiting flow of impurities between said conductive layer and said impurity region, said thin film being of a thickness sufficient to enable direct tunnel current flow therethrough and allow ohmic contact between said conductive layer and said impurity region.
Claim 21
Dependent Claim
17 words
The semiconductor memory device according to claim 14, wherein: said thin film is a nitrided oxide film.
Claim 22
Dependent Claim
30 words
The contact structure according to claim 11, wherein: said nitrided oxide film has a thickness which allows said first conductive layer and second conductive layer to be in ohmic contact.
Claim 23
Dependent Claim
67 words
A semiconductor memory device, comprising: a first conductive layer; a second conductive layer in contact with said first conductive layer; and a layer of a material including nitrogen atoms formed in a contact part between said first conductive layer and said second conductive layer and having a thickness sufficient to enable direct tunnel current flow therethrough and allow ohmic contact between the first and second conductive layers.
Claim 24
Dependent Claim
67 words
A semiconductor memory device, comprising: a first conductive layer; a second conductive layer in contact with said first conductive layer; and a layer of a material including nitrogen atoms formed in a contact part between said first conductive layer and said second conductive layer and having a thickness sufficient to enable direct tunnel current flow therethrough and allow ohmic contact between the first and second conductive layers.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-03-24 | 2000-09-23 | 2001-03-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-03-24 | 2004-09-23 | 2005-03-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-03-24 | 2008-09-23 | 2009-03-25 | $7700.00 | Window Closed / Lapsed |