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US5612974A Expired / Lapsed US ⏱️ 0.0 years remaining

Convolutional encoder for use on an integrated circuit that performs multiple communication tasks

Assignee: NXP USA Inc
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Filing: 1994-11-01
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Granted: 1997-03-18
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Expires: 2014-11-01
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Abstract

Abstract A convolutional encoder may be accomplished by providing a first register, a plurality of logic gates, a sampler, a second register, and a sequencer. In operation, the first register receives digital information at a code rate which convolutionally encoded by the plurality of logic gates to produce, based on the code rate, encoded samples. The sampler extracts the encoded samples at an extraction rate and provides them to the second register. To control this operation, the sequencer generates the code rate and the extraction rate based on a count value.

Inventors

  • 👤 Paul M. Astrachan

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 20:16
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/03; H03M13/23; H04; H04L; H04L27/00

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 163 words
A convolution encoder comprising: a first register that receives digital information at a code rate; a plurality of logic gates operably coupled to the first register, wherein the plurality of logic gates performs a convolution encode function on the digital information received by the first register to produce, based on the code rate, a first number of encoded samples; a sampler operably coupled to the plurality of logic gates, wherein the sampler extracts the first number of encoded samples at an extraction rate to produce extracted information; a second register operably coupled to the sampler, wherein the second register receives the extracted information from the sampler; a counter that provides a count value; and a sequencer operably coupled to the first register and the plurality of logic gates, wherein the sequencer generates the code rate and the extraction rate based on the count value, and wherein the sequencer provides the code rate to the first register and the extraction rate to the sampler.
Claim 2
Dependent Claim 163 words
A convolution encoder comprising: a first register that receives digital information at a code rate; a plurality of logic gates operably coupled to the first register, wherein the plurality of logic gates performs a convolution encode function on the digital information received by the first register to produce, based on the code rate, a first number of encoded samples; a sampler operably coupled to the plurality of logic gates, wherein the sampler extracts the first number of encoded samples at an extraction rate to produce extracted information; a second register operably coupled to the sampler, wherein the second register receives the extracted information from the sampler; a counter that provides a count value; and a sequencer operably coupled to the first register and the plurality of logic gates, wherein the sequencer generates the code rate and the extraction rate based on the count value, and wherein the sequencer provides the code rate to the first register and the extraction rate to the sampler.
Claim 3
Dependent Claim 17 words
The convolution encoder of claim 1, wherein the plurality of logic gates comprises a plurality of adders.
Claim 4
Dependent Claim 17 words
The convolution encoder of claim 1, wherein the extraction rate comprises a function of the code rate.
Claim 5
Dependent Claim 194 words
A received signal quality checker, comprising: a first register that receives digital information at a code rate; a plurality of logic gates operably coupled to the first register, wherein the plurality of logic gates perform a convolution encode function on the digital information received by the register to produce, based on the code rate, a first number of encoded samples; a sampler operably coupled to the plurality of logic gates, wherein the sampler extracts the first number of encoded samples at an extraction rate to produce extracted information; a sequencer operably coupled to the first register and the plurality of logic gates, wherein the sequencer generates the code rate and the extraction rate and provides the code rate to the first register and the extraction rate to the sampler; and a comparator operably coupled to the sampler, wherein the comparator compares the extracted information with a stream of first encoded digital information, and when the extracted information compares favorably with the stream of first encoded digital information, accuracy of the digital information is confirmed, and wherein the digital information received by the register is derived from the stream of the first encoded digital information.
Claim 6
Dependent Claim 194 words
A received signal quality checker, comprising: a first register that receives digital information at a code rate; a plurality of logic gates operably coupled to the first register, wherein the plurality of logic gates perform a convolution encode function on the digital information received by the register to produce, based on the code rate, a first number of encoded samples; a sampler operably coupled to the plurality of logic gates, wherein the sampler extracts the first number of encoded samples at an extraction rate to produce extracted information; a sequencer operably coupled to the first register and the plurality of logic gates, wherein the sequencer generates the code rate and the extraction rate and provides the code rate to the first register and the extraction rate to the sampler; and a comparator operably coupled to the sampler, wherein the comparator compares the extracted information with a stream of first encoded digital information, and when the extracted information compares favorably with the stream of first encoded digital information, accuracy of the digital information is confirmed, and wherein the digital information received by the register is derived from the stream of the first encoded digital information.
Claim 7
Dependent Claim 19 words
The received signal quality checker of claim 4, wherein the plurality of logic gates comprises a plurality of adders.
Claim 8
Dependent Claim 19 words
The received signal quality checker of claim 4, wherein the extraction rate comprises a function of the code rate.
Claim 9
Dependent Claim 33 words
The received signal quality checker of claim 4 further comprises an error counter, wherein the error counter counts each time the extracted information compares unfavorably with the stream of first encoded digital information.
Claim 10
Independent Claim 94 words
A method for convolutionally encoding a digital information, the method comprising the steps of: receiving the digital information at a bit code rate; convolutionally encoding the digital information based on the bit code rate to produce a first number of encoded samples; extracting the first number of encoded samples at an extraction rate; storing the extracted first number of encoded samples; counting the extracted first number of encoded samples to produce an encoding count; and outputting the extracted first number of encoded samples as convolution signals when the encoding count reaches a predetermined value.
Claim 11
Independent Claim 94 words
A method for convolutionally encoding a digital information, the method comprising the steps of: receiving the digital information at a bit code rate; convolutionally encoding the digital information based on the bit code rate to produce a first number of encoded samples; extracting the first number of encoded samples at an extraction rate; storing the extracted first number of encoded samples; counting the extracted first number of encoded samples to produce an encoding count; and outputting the extracted first number of encoded samples as convolution signals when the encoding count reaches a predetermined value.
Claim 12
Independent Claim 112 words
A method for determining quality of reconstructed digital information, the method comprising the steps of: receiving the reconstructed digital information at a bit code rate; convolutionally encoding the reconstructed digital information based on the bit code rate to produce a first number of encoded samples; sampling the first number of encoded samples at an extraction rate to produce extracted information; and comparing the extracted information with a stream of first encoded digital information, and when the extracted information compares favorably with the stream of first encoded digital information, accuracy of the digital information is confirmed and wherein the reconstructed digital information is derived from the stream of the first encoded digital information.
Claim 13
Independent Claim 112 words
A method for determining quality of reconstructed digital information, the method comprising the steps of: receiving the reconstructed digital information at a bit code rate; convolutionally encoding the reconstructed digital information based on the bit code rate to produce a first number of encoded samples; sampling the first number of encoded samples at an extraction rate to produce extracted information; and comparing the extracted information with a stream of first encoded digital information, and when the extracted information compares favorably with the stream of first encoded digital information, accuracy of the digital information is confirmed and wherein the reconstructed digital information is derived from the stream of the first encoded digital information.
Claim 14
Dependent Claim 31 words
The method of claim 9 further comprises counting each occurrence of an unfavorable comparison between the extracted information and the stream of first encoded digital information to produce an error count.

References Cited (Backward Citations)

US4881241A Cited
US5027374A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-03-17 2000-09-16 2001-03-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-03-17 2004-09-16 2005-03-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-03-17 2008-09-16 2009-03-18 $7700.00 Window Closed / Lapsed

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