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US5608353A Expired / Lapsed US ⏱️ 0.0 years remaining

HBT power amplifier

Assignee: RF Micro Devices Inc
•
Filing: 1995-03-29
•
Granted: 1997-03-04
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Expires: 2015-03-29
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Abstract

Abstract An improved heterojunction bipolar transistor power amplifier circuit providing an efficient and linear amplifier comprising: a first heterojunction bipolar transistor (HBT) having a base emitter voltage; a power supply; a power supply resistor connected to the power supply causing DC current to flow through the first HBT which develops a resultant voltage equal to the base emitter voltage of the first HBT; at least two manifold base resistors; at least two output HBTs, each of which receive the resultant voltage through its corresponding manifold base resistor; a RF signal input; at least two segmented capacitors, each coupled in parallel to receive the RF signal input and to the input of each corresponding output HBT; the segmented capacitors having a common input connected to the RF signal input and having individual outputs that are DC isolated from each other and which are connected to each output HBT; a RF output signal obtained from the parallel connection of the output HBTs; and provided that each HBT is connected to ground.

Inventors

  • 👤 William J. Pratt

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 15:59
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/189; H03F3/19; H03F1/00; H03F1/30; H03F1/302; H03F3/20; H03F3/21; H03F3/211; H03F2203/00; H03F2203/20; H03F2203/21; H03F2203/211; H03F2203/21178

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 165 words
An improved heterojunction bipolar transistor power amplifier circuit comprising: a first heterojunction bipolar transistor (HBT) having a base emitter voltage; a power supply; a power supply resistor connected to the power supply causing DC current to flow through the first HBT which develops a resultant voltage equal to the base emitter voltage of the first HBT; at least two manifold base resistors; at least two output HBTs, each of which receive the resultant voltage through its corresponding manifold base resistor; a RF signal input; at least two capacitors formed from a segmented capacitor, each coupled in parallel to receive the RF signal input and to the input of each corresponding output HBT; the capacitors having a common input connected to the RF signal input and having individual outputs that are DC isolated from each other and which are connected to each output HBT; a RF output signal obtained from the parallel connection of the output HBTs; and provided that each HBT is connected to ground.
Claim 2
Dependent Claim 165 words
An improved heterojunction bipolar transistor power amplifier circuit comprising: a first heterojunction bipolar transistor (HBT) having a base emitter voltage; a power supply; a power supply resistor connected to the power supply causing DC current to flow through the first HBT which develops a resultant voltage equal to the base emitter voltage of the first HBT; at least two manifold base resistors; at least two output HBTs, each of which receive the resultant voltage through its corresponding manifold base resistor; a RF signal input; at least two capacitors formed from a segmented capacitor, each coupled in parallel to receive the RF signal input and to the input of each corresponding output HBT; the capacitors having a common input connected to the RF signal input and having individual outputs that are DC isolated from each other and which are connected to each output HBT; a RF output signal obtained from the parallel connection of the output HBTs; and provided that each HBT is connected to ground.
Claim 3
Dependent Claim 26 words
The improved heterojunction bipolar transistor power amplifier circuit of claim 1, wherein said power supply is a linear bias supply that enhances linearity of the circuit.
Claim 4
Dependent Claim 91 words
The improved heterojunction bipolar transistor power amplifier circuit of claim 1, whereby the segmented capacitor comprises a top plate; a bottom plate connected to, but electrically isolated from, the top plate; a two plate capacitor formed wherever the top plate overlaps the bottom plate with a capacitance determined by the area of the overlap; a RF input connected to the bottom plate; the top plate having areas used to AC connect to the output HBTs in such a manner to allow the two plate capacitor to remain isolated from DC voltages.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-03-03 2000-09-02 2001-03-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-03-03 2004-09-02 2005-03-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-03-03 2008-09-02 2009-03-04 $7700.00 Window Closed / Lapsed

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