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US5606616A Expired / Lapsed US ⏱️ 0.0 years remaining

Cryptographic apparatus with double feedforward hash function

Assignee: Google Technology Holdings LLC
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Filing: 1995-07-03
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Granted: 1997-02-25
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Expires: 2015-07-03
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Abstract

Abstract Apparatus is provided for authenticating information using a double feedforward hash function to provide complementarity in the implementation of an encryption algorithm. A cryptographic processor has a first input for receiving plaintext, a second input for receiving a key and an output for outputting ciphertext generated by cryptographically processing the plaintext and key. A first circuit element is responsive to the ciphertext and plaintext for outputting a first ciphertext derivative. A second circuit element is responsive to at least a portion of the first ciphertext derivative and the key for outputting a second ciphertext derivative. The first and second circuit elements can be XOR gates. Alternatively, these elements can be provided using lookup tables. Subsequent cryptographic processor stages can be provided having a first input for receiving second plaintext, a second input for receiving the second ciphertext derivative as a key, and an output for outputting second ciphertext generated by cryptographically processing the second plaintext and the second ciphertext derivative. In an illustrated embodiment, the cryptographic processor is a DES processor.

Inventors

  • 👤 Eric Sprunk
  • 👤 Paul Moroney
  • 👤 Candace Anderson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 17:33
CPC Classifications
H; H04; H04L; H04L9/00; H04L9/06; H04L9/0643; H04L2209/00; H04L2209/12; H04L2209/125

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 186 words
Cryptographic apparatus comprising: a cryptographic processor having a first input for receiving eight parallel bytes F 1 -F 8 of first input data, a second input for receiving eight parallel bytes S 1 -S 8 of second input data, and an output for outputting eight parallel bytes C 1 -C 8 of ciphertext generated by cryptographically processing said first and second input data; first means for processing said ciphertext and said first input data to produce a first ciphertext derivative comprising eight parallel bytes FD 1 -FD 8 ; and second means for processing said first ciphertext derivative and said second input data for outputting a second ciphertext derivative comprising eight parallel bytes SD 1 -SD 8 ; wherein: said first means logically processes each of said ciphertext bytes C 1 -C 8 with the like numbered first input data byte F 1 -F 8 to produce said first ciphertext derivative; and said second means logically processes each of said first ciphertext derivative bytes FD 1 -FD 8 with the like numbered second input data byte S 1 -S 8 to produce said second ciphertext derivative.
Claim 2
Dependent Claim 186 words
Cryptographic apparatus comprising: a cryptographic processor having a first input for receiving eight parallel bytes F 1 -F 8 of first input data, a second input for receiving eight parallel bytes S 1 -S 8 of second input data, and an output for outputting eight parallel bytes C 1 -C 8 of ciphertext generated by cryptographically processing said first and second input data; first means for processing said ciphertext and said first input data to produce a first ciphertext derivative comprising eight parallel bytes FD 1 -FD 8 ; and second means for processing said first ciphertext derivative and said second input data for outputting a second ciphertext derivative comprising eight parallel bytes SD 1 -SD 8 ; wherein: said first means logically processes each of said ciphertext bytes C 1 -C 8 with the like numbered first input data byte F 1 -F 8 to produce said first ciphertext derivative; and said second means logically processes each of said first ciphertext derivative bytes FD 1 -FD 8 with the like numbered second input data byte S 1 -S 8 to produce said second ciphertext derivative.
Claim 3
Dependent Claim 85 words
Cryptographic apparatus in accordance with claim 1 wherein: said first means comprise a nonlinear function for logically processing each of said ciphertext bytes C 1 -C 8 with the like numbered first input data byte F 1 -F 8 to produce said first ciphertext derivative; and said second means comprise a nonlinear function for logically processing each of said first ciphertext derivative bytes FD 1 -FD 8 with the like numbered second input data byte S 1 -S 8 to produce said second ciphertext derivative.
Claim 4
Dependent Claim 22 words
Cryptographic apparatus in accordance with claim 2 wherein said nonlinear functions output one half the number of bits as are input thereto.
Claim 5
Dependent Claim 75 words
Cryptographic apparatus in accordance with claim 1 wherein said first means exclusively OR's each of said ciphertext bytes C 1 -C 8 with the like numbered first input data byte F 1 -F 8 to produce said first ciphertext derivative; and said second means exclusively OR's each of said first ciphertext derivative bytes FD 1 FD 8 with the like numbered second input data byte S 1 -S 8 to produce said second ciphertext derivative.
Claim 6
Dependent Claim 35 words
Cryptographic apparatus in accordance with claim 4 wherein said first means comprise a lookup table addressed by said first input data and said ciphertext to output the exclusive OR's of the like numbered bytes thereof.
Claim 7
Dependent Claim 37 words
Cryptographic apparatus in accordance with claim 5 wherein said second means comprise a lookup table addressed by said second input data and said first ciphertext derivative to output the exclusive OR's of the like numbered bytes thereof.
Claim 8
Dependent Claim 37 words
Cryptographic apparatus in accordance with claim 4 wherein said second means comprise a lookup table addressed by said second input data and said first ciphertext derivative to output the exclusive OR's of the like numbered bytes thereof.
Claim 9
Dependent Claim 60 words
Cryptographic apparatus in accordance with claim 1 further comprising: a second cryptographic processor stage having a first input for receiving eight parallel bytes of third input data, a second input for receiving said second ciphertext derivative, and an output for outputting eight parallel bytes of second ciphertext generated by cryptographically processing said third input data and said second ciphertext derivative.
Claim 10
Dependent Claim 14 words
Cryptographic apparatus in accordance with claim 8 wherein said cryptographic processors are DES processors.
Claim 11
Dependent Claim 15 words
Cryptographic apparatus in accordance with claim 1 wherein said cryptographic processor is a DES processor.
Claim 12
Dependent Claim 22 words
Cryptographic apparatus in accordance with claim 2 further comprising lookup tables for implementing the nonlinear functions of said first and second means.
Claim 13
Dependent Claim 146 words
Cryptographic apparatus comprising: a cryptographic processor having a first input for receiving eight parallel bytes F 1 -F 8 of input data, a second input for receiving parallel bytes F 2 -F 8 of said first input data as a key, and an output for outputting seven parallel bytes C 1 -C 7 of ciphertext generated by cryptographically processing said input data and said key; first means for logically processing each of the first seven input data bytes F 1 -F 7 with the succeeding input data byte F 2 -F 8 , respectively, to produce seven bytes of feedforward data FF 1 -FF 7 ; and second means for logically processing each of said feedforward data bytes FF 1 -FF 7 with the like numbered ciphertext byte C 1 -C 7 to produce a ciphertext derivative comprising seven parallel bytes D 1 -D 7 .
Claim 14
Dependent Claim 146 words
Cryptographic apparatus comprising: a cryptographic processor having a first input for receiving eight parallel bytes F 1 -F 8 of input data, a second input for receiving parallel bytes F 2 -F 8 of said first input data as a key, and an output for outputting seven parallel bytes C 1 -C 7 of ciphertext generated by cryptographically processing said input data and said key; first means for logically processing each of the first seven input data bytes F 1 -F 7 with the succeeding input data byte F 2 -F 8 , respectively, to produce seven bytes of feedforward data FF 1 -FF 7 ; and second means for logically processing each of said feedforward data bytes FF 1 -FF 7 with the like numbered ciphertext byte C 1 -C 7 to produce a ciphertext derivative comprising seven parallel bytes D 1 -D 7 .
Claim 15
Dependent Claim 101 words
Cryptographic apparatus in accordance with claim 12 wherein: said first means comprise a nonlinear function for logically processing each of the first seven input data bytes F 1 -F 7 with the succeeding input data byte F 2 -F 8 , respectively, to produce said seven bytes of feedforward data FF 1 -FF 7 ; and said second means comprise a nonlinear function for logically processing each of said feedforward data bytes FF 1 -FF 7 with the like numbered ciphertext byte C 1 -C 7 to produce said ciphertext derivative comprising said seven parallel bytes D 1 -D 7 .
Claim 16
Dependent Claim 22 words
Cryptographic apparatus in accordance with claim 13 wherein said nonlinear functions output one half the number of bits as are input thereto.
Claim 17
Dependent Claim 91 words
Cryptographic apparatus in accordance with claim 12 wherein: said first means exclusively OR's each of the first seven input data bytes F 1 -F 7 with the succeeding input data byte F 2 -F 8 , respectively, to produce said seven bytes of feedforward data FF 1 -FF 7 ; and said second means exclusively OR's each of said feedforward data bytes FF 1 -FF 7 with the like numbered ciphertext byte C 1 -C 7 to produce said ciphertext derivative comprising said seven parallel bytes D 1 -D 7 .
Claim 18
Dependent Claim 31 words
Cryptographic apparatus in accordance with claim 15 wherein said first means comprise a lookup table addressed by said first seven and succeeding input data bytes to output the exclusive OR's thereof.
Claim 19
Dependent Claim 33 words
Cryptographic apparatus in accordance with claim 16 wherein said second means comprise a lookup table addressed by said feedforward data bytes and the like numbered ciphertext bytes to output the exclusive OR's thereof.
Claim 20
Dependent Claim 33 words
Cryptographic apparatus in accordance with claim 15 wherein said second means comprise a lookup table addressed by said feedforward data bytes and the like numbered ciphertext bytes to output the exclusive OR's thereof.
Claim 21
Dependent Claim 15 words
Cryptographic apparatus in accordance with claim 12 wherein said cryptographic processor is a DES processor.
Claim 22
Dependent Claim 22 words
Cryptographic apparatus in accordance with claim 13 further comprising lookup tables for implementing the nonlinear functions of said first and second means.

References Cited (Backward Citations)

US5005200A Cited
US5307409A Cited
US5544244A Cited
US5432848A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-02-25 2000-08-26 2001-02-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-02-25 2004-08-26 2005-02-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-02-25 2008-08-26 2009-02-25 $7700.00 Window Closed / Lapsed

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