Audio output device having digital signal processor for responding to commands issued by processor by emulating designated functions according to common command interface

Claim 2

A computer system, comprising: a system bus, a processor coupled to said system bus, a system memory coupled to said system bus, and an audio-output device coupled to said system bus, said audio-output device comprising a bus-interface element having means for coupling to said system bus, means for receiving a plurality of commands issued by said processor, and means for transmitting data to said processor; a digital signal processor coupled to said bus-interface element, said digital signal processor having means for interpreting and executing instructions, means for receiving from said bus-interface element a signal indicative of receipt of at least one of said plurality of commands, and means for sending to said bus-interface element a signal indicative of completion of said at least one command; a local memory coupled to said bus-interface element and to said digital signal processor, said local memory having a communication area; said bus-interface element having means for writing to said communication area upon receipt of a first subset of said plurality of commands, and means for reading from said communication area upon receipt of a second subset of said plurality of commands; and said digital signal processor having means for reading from and writing to said communication area in response to said at least one command; said communication area comprising a plurality of addressable registers pointed to by a base register, said base register comprising a dynamically allocable value indicative of an address of one of said plurality of addressable registers, wherein said plurality of commands issued by said processor are in a format required by a common command interface for said audio-output device, and wherein said Digital Signal Processor is disposed to respond to said commands by emulating designated functions according to said common command interface.

Claim 3

An audio-output device for coupling to a computer system, said system having a system bus, a processor coupled to said system bus, said audio-output device comprising: a bus-interface element having means for coupling to said system bus, means for receiving a plurality of commands issued by said processor, and means for transmitting data to said processor; a digital signal processor coupled to said bus-interface element, said digital signal processor having means for interpreting and executing instructions, means for receiving from said bus-interface element a signal indicative of receipt of at least one of said plurality of commands, and means for sending to said bus-interface element a signal indicative of completion of said at least one command; a memory coupled to said bus-interface element and to said digital signal processor, said memory having a communication area; said bus-interface element having means for writing to said communication area upon receipt of a first subset of said plurality of commands, and means for reading from said communication area upon receipt of a second subset of said plurality of commands; said digital signal processor having means for reading from and writing to said communication area in response to said at least one command; said communication area comprising a plurality of addressable registers pointed to by a base register, said base register comprising a dynamically allocable value indicative of an address of one of said plurality of addressable registers; a read communication area having a zeroth and a first read communication areas, said zeroth and said first read communication areas located in said memory at a zeroth offset and a first offset from said address, respectively; and a write communication area located in said memory at a second offset from said address, wherein said base address register providing a minimum address and an offset for indicating said read communication area and said write communication area, wherein said zeroth and first read communication areas enabling said bus interface element to read data from said zeroth or first read communication area for presentation to said processor at the same time said digital signal processor is performing an operation and writing output data at said zeroth or first read communication area also for presentation to said processor.

Claim 4

An audio-output device for coupling to a computer system, said system having a system bus, a processor coupled to said system bus, said audio-output device comprising: a bus-interface element having means for coupling to said system bus, means for receiving a plurality of commands issued by said processor, and means for transmitting data to said processor; a digital signal processor coupled to said bus-interface element, said digital signal processor having means for interpreting and executing instructions, means for receiving from said bus-interface element a signal indicative of receipt of at least one of said plurality of commands, and means for sending to said bus-interface element a signal indicative of completion of said at least one command; a memory coupled to said bus-interface element and to said digital signal processor, said memory having a communication area; said bus-interface element having means for writing to said communication area upon receipt of a first subset of said plurality of commands, and means for reading from said communication area upon receipt of a second subset of said plurality of commands; said digital signal processor having means for reading from and writing to said communication area in response to said at least one command; said communication area comprising a plurality of addressable registers pointed to by a base register, said base register comprising a dynamically allocable value indicative of an address of one of said plurality of addressable registers; a read communication area having a zeroth and a first read communication areas, said zeroth and said first read communication areas located in said memory at a zeroth offset and a first offset from said address, respectively; and a write communication area located in said memory at a second offset from said address, wherein said base address register providing a minimum address and an offset for indicating said read communication area and said write communication area, wherein said zeroth and first read communication areas enabling said bus interface element to read data from said zeroth or first read communication area for presentation to said processor at the same time said digital signal processor is performing an operation and writing output data at said zeroth or first read communication area also for presentation to said processor.

Claim 5

An audio-output device, as in claim 2, wherein said plurality of commands issued by said processor are in a format required by a common command interface for said audio-output device, and wherein said digital signal processor is disposed to respond to said commands by emulating designated functions according to said common command interface.

Claim 6

An audio-output device, as in claim 2, wherein said plurality of commands issued by said processor are in a format required by a common command interface for said audio output device, and wherein said audio-output device is disposed to respond to said commands by generating a designated sound sequence according to said common command interface.

Claim 7

An audio-output device as in claim 3, comprising a buffer located in said memory, said buffer providing for a data word comprising a request bit for indicating whether a command has been received from the processor, a read/write bit for indicating whether said command is a read command or a write command, an register pointer field for indicating which one of a plurality of audio-output registers are to be emulated, an address field for indicating which one of said plurality of emulated registers is designated by said command, and a data field for indicating data communicated by said command; a system memory coupled to said system bus; and a DMA transfer device coupled to said memory and to said system memory, said DMA transfer device being responsive to said command for transferring data between said memory and said system memory.

Claim 8

An audio-output device as in claim 2, wherein said means for receiving from said bus-interface element comprises a data communication word, said data communication word having a part indicating one of a set of registers for said digital signal processor to emulate and a part indicating data from said processor.

Claim 9

An audio-output device as in claim 6, wherein said data communication word comprises a part having a first state indicating said receipt of said at least one of said plurality of commands, and a second state indicating said completion of said at least one command.

Claim 10

An audio-output device as in claim 6, wherein said data communication word comprises a part indicating a read command or a write command, and a part indicating one of a plurality of said sets of registers for said digital signal processor to emulate.

Claim 11

An audio-output device as in claim 2, wherein said memory comprises a program memory and a data memory.

Claim 12

An audio-output device as in claim 2, wherein said memory is coupled to said system bus.

Claim 13

An audio-output device as in claim 2, wherein said memory is not coupled to said system bus.

Claim 14

An audio-output device as in claim 2, wherein said signal indicative of receipt and said signal indicative of completion comprise signals in a configuration of said digital signal processor and said bus-interface unit in which a polling operation is used with said digital signal processor for new commands and for completion of commands.

Claim 15

An audio-output device as in claim 2, wherein said signal indicative of receipt and said signal indicative of completion comprise interrupt signals.