US5598157A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sigma Delta analog to digital converter with three point calibration apparatus and method
Assignee: Intersil Americas LLC
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Filing: 1994-10-28
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Granted: 1997-01-28
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Expires: 2014-10-28
Abstract
Abstract An analog to digital converter 10 has a switched capacitor analog modulator 12 with three point calibration. Offset calibration applies on offset correction value in OCR 22 to an uncalibrated digital output. Register 28 holds a desired full scale value, register 24 holds a positive full scale value, and register 26 holds a negative full scale value. Depending upon the polarity of the converted analog signal, the offset corrected digital signal is multiplied by a positive or a negative gain correction factor.
Inventors
- 👤 John J. Kornblum
- 👤 Carlos A. Ugarte
- 👤 Fan Y. Ma
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 13:35
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/30; H03M3/38; H03M1/00; H03M1/06; H03M1/0602; H03M1/0604; H03M1/0607; H03M3/458
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
99 words
A method for three point calibration of an analog to digital converter with a Sigma Delta modulator with n bit resolution comprising the steps of: applying an input offset reference signal to the Sigma Delta modulator to generate a digital offset correction signal; storing the digital offset correction digital output in an offset correction register; applying a positive full scale signal to the Sigma Delta modulator; storing the digital output in a positive full scale correction register; applying a negative full scale signal to the Sigma Delta modulator; storing the digital output in a negative full scale correction register.
Claim 2
Independent Claim
99 words
A method for three point calibration of an analog to digital converter with a Sigma Delta modulator with n bit resolution comprising the steps of: applying an input offset reference signal to the Sigma Delta modulator to generate a digital offset correction signal; storing the digital offset correction digital output in an offset correction register; applying a positive full scale signal to the Sigma Delta modulator; storing the digital output in a positive full scale correction register; applying a negative full scale signal to the Sigma Delta modulator; storing the digital output in a negative full scale correction register.
Claim 3
Dependent Claim
84 words
The method of claim 1 further comprising the steps of: setting a desired full scale value to half the resolution of the ADC; dividing the desired full scale value by the value stored in the positive full scale correction register to derive a positive slope correction factor; storing the positive slope correction factor; dividing the desired full scale value by the value stored in the negative full scale correction register to derive a negative slope correction factor; and storing the negative slope correction factor.
Claim 4
Dependent Claim
92 words
The method of claim 2 further comprising the steps of: applying an analog signal to the Sigma Delta modulator to generate an uncorrected digital output signal; reducing the magnitude of the uncorrected digital signal by the magnitude of the offset correction register to derive an offset corrected signal; sensing the polarity of the offset corrected signal to determine if the offset corrected signal is positive or negative; multiplying a positive offset corrected signal by the positive slope correction factor and multiplying a negative offset corrected signal by the negative slope correction factor.
Claim 5
Dependent Claim
137 words
The method of claim 1 further comprising the steps of: applying an analog signal to the Sigma Delta modulator to generate an uncorrected digital output signal; reducing the magnitude of the uncorrected digital signal by the magnitude of the offset correction register to derive an offset corrected signal; sensing the polarity of the offset corrected signal to determine if the offset corrected signal is positive or negative; multiplying the offset corrected signal by a maximum of half the resolution of the ADC; dividing the offset corrected signal by the digital value stored in the positive full scale correction register when the polarity of the offset corrected signal is positive; and dividing the offset corrected signal by the digital value stored in the negative full scale correction register when the polarity of the offset corrected signal is negative.
Claim 6
Dependent Claim
121 words
A Sigma Delta ADC with n bit resolution and three point calibration comprising: an analog modulator; means for applying an input offset reference signal to the Sigma Delta analog modulator to generate a digital offset correction signal; an offset correction register for storing the digital offset correction signal; means for applying a positive full scale signal to the Sigma Delta analog modulator to generate a positive full scale digital signal; a positive full scale correction register for storing the positive full scale digital signal; means for applying a negative full scale signal to the Sigma Delta analog modulator to generate a negative full scale digital signal; and a negative full scale correction register for storing the negative full scale digital signal.
Claim 7
Dependent Claim
121 words
A Sigma Delta ADC with n bit resolution and three point calibration comprising: an analog modulator; means for applying an input offset reference signal to the Sigma Delta analog modulator to generate a digital offset correction signal; an offset correction register for storing the digital offset correction signal; means for applying a positive full scale signal to the Sigma Delta analog modulator to generate a positive full scale digital signal; a positive full scale correction register for storing the positive full scale digital signal; means for applying a negative full scale signal to the Sigma Delta analog modulator to generate a negative full scale digital signal; and a negative full scale correction register for storing the negative full scale digital signal.
Claim 8
Dependent Claim
97 words
The Sigma Delta ADC of claim 5 further comprising: a desired full scale value set to half the resolution of the ADC; means for dividing a maximum value of the desired full scale value by the digital signal stored in the positive full scale correction register to derive a positive slope correction factor; means for dividing a maximum value of the desired full scale value by the value stored in the negative full scale correction register to derive a negative slope correction factor; a correction factor register for storing the positive and the negative slope correction factors.
Claim 9
Dependent Claim
100 words
The Sigma Delta ADC of claim 6 further comprising: means for applying an analog signal to the Sigma Delta analog modulator to generate an uncorrected digital output signal; means for reducing the magnitude of the uncorrected digital signal by the magnitude of the offset correction register to derive an offset corrected signal; means for sensing the polarity of the offset corrected signal to determine if the offset corrected signal is positive or negative; means for multiplying a positive offset corrected signal by the positive slope correction factor and multiplying a negative offset corrected signal by the negative slope correction factor.
Claim 10
Dependent Claim
33 words
The Sigma Delta ADC of claim 5 further comprising: a polarized reference voltage source of one polarity for generating one of said positive or negative full scale signals and zero reference voltage source.
Claim 11
Dependent Claim
81 words
The Sigma Delta ADC of claim 8 further comprising: a differential input to the ADC having positive and negative input terminals, means, for coupling the polarized reference voltage source to one input terminal and the ground reference voltage source to the other terminal to generate a first full scale input signal of one polarity; and means for reversing the couplings of the reference voltage sources to the differential inputs to generate a second full scale input signal of an opposite polarity.
Claim 12
Dependent Claim
149 words
The Sigma Delta ADC of claim 5 further comprising: means for applying an analog signal to the Sigma Delta modulator to generate an uncorrected digital output signal; means for reducing the magnitude of the uncorrected digital signal by the magnitude of the offset correction register to derive an offset corrected signal; means for sensing the polarity of the offset corrected signal to determine whether the offset corrected signal is positive or negative; means for multiplying the offset corrected signal by the maximum value stored of the desired full scale value; means for dividing the offset corrected signal by the digital value stored in the positive full scale correction register when the polarity of the offset corrected signal is positive; and means for dividing the offset corrected signal by the digital value stored in the negative full scale correction register when the polarity of the offset corrected signal is negative.
Claim 13
Dependent Claim
93 words
A piece wise linear gain corrected ADC with an analog modulator, a digital filter having an input coupled to the output of the analog modulator and generating a filtered output comprising: offset correction means for correcting offset of the filtered output of the converter to generate offset corrected signal; first gain correction means having a first correction slope for gain correcting offset corrected signals over a first range; second gain correction means having a second correction slope different from said first correction slope for gain correcting offset corrected signals over a second range.
Claim 14
Dependent Claim
93 words
A piece wise linear gain corrected ADC with an analog modulator, a digital filter having an input coupled to the output of the analog modulator and generating a filtered output comprising: offset correction means for correcting offset of the filtered output of the converter to generate offset corrected signal; first gain correction means having a first correction slope for gain correcting offset corrected signals over a first range; second gain correction means having a second correction slope different from said first correction slope for gain correcting offset corrected signals over a second range.
References Cited (Backward Citations)
US4143361A
Cited
US4280196A
Cited
US4799041A
Cited
US4943807A
Cited
US4947168A
Cited
US4918454B1
Cited
US4918454A
Cited
US4894656A
Cited
US5121119A
Cited
US5087914A
Cited
US5172115A
Cited
US5248970A
Cited
US5266952A
Cited
US5257026A
Cited
US5206602A
Cited
US5293169A
Cited
US5329281A
Cited
US5337230A
Cited
US5305004A
Cited
US5465092A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-01-28 | 2000-07-29 | 2001-01-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-01-28 | 2004-07-29 | 2005-01-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-01-28 | 2008-07-29 | 2009-01-28 | $7700.00 | Window Closed / Lapsed |