US5590378A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for aligning and padding data on transfers between devices of different data widths and organizations
Assignee: Hewlett Packard Development Co LP
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Filing: 1996-02-01
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Granted: 1996-12-31
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Expires: 2016-02-01
Abstract
Abstract A computer system which includes a DMA controller on the local I/O unit which can be programmed by either the host processor or the local processor. Semaphore flags and lock bits are provided to allow determination of control of the local DMA controller and for passing information. Additionally, data alignment and padding circuitry is provided. The circuitry is informed of the logical data arrangement desired or utilized by the host processor or other devices and knows the data arrangement of the local processor. The circuitry properly obtains and realigns the data based on the transfer direction and data arrangement. The circuitry further properly zero pads the data when realignment is such that padding is necessary.
Inventors
- 👤 John S. Thayer
- 👤 Patrick L. Ferguson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 11:30
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/28
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
273 words
A data transfer device for bidirectionally transferring data between first and second data storing devices having different basic data widths and wherein the second data storage device includes a plurality of modes having different numbers of significant data bits contained in the basic data width and wherein significant data is stored in the first data storage device in a packed manner, the data transfer device comprising: first data receiving circuitry for receiving data from the first data storage device at the basic data width of the first data storage device; first data providing circuitry for providing data to the first data storage device at the basic data width of the first data storage device; second data receiving circuitry for receiving data from the second data storage device at the basic data width of the second data storage device; second data providing circuitry for providing data to the second data storage device at the basic data width of the second data storage device; control register circuitry for receiving the mode indicating the amount of significant data in the second data storage device basic data width; multiplexor circuitry for converting data received from the first data storage device to the proper mode for the second data storage device and for inserting zero values in the remaining portions of the second data storage device basic data width for provision to the second data storage device; and multiplexor circuitry for converting data received from the second data storage device to the proper location for said first data storage device according to the mode for the second data storage device for provision to the first data storage device.
Claim 2
Dependent Claim
273 words
A data transfer device for bidirectionally transferring data between first and second data storing devices having different basic data widths and wherein the second data storage device includes a plurality of modes having different numbers of significant data bits contained in the basic data width and wherein significant data is stored in the first data storage device in a packed manner, the data transfer device comprising: first data receiving circuitry for receiving data from the first data storage device at the basic data width of the first data storage device; first data providing circuitry for providing data to the first data storage device at the basic data width of the first data storage device; second data receiving circuitry for receiving data from the second data storage device at the basic data width of the second data storage device; second data providing circuitry for providing data to the second data storage device at the basic data width of the second data storage device; control register circuitry for receiving the mode indicating the amount of significant data in the second data storage device basic data width; multiplexor circuitry for converting data received from the first data storage device to the proper mode for the second data storage device and for inserting zero values in the remaining portions of the second data storage device basic data width for provision to the second data storage device; and multiplexor circuitry for converting data received from the second data storage device to the proper location for said first data storage device according to the mode for the second data storage device for provision to the first data storage device.
Claim 3
Dependent Claim
20 words
The data transfer device of claim 1, wherein each of said multiplexor circuitry includes a plurality of multiplexors and latches.
Claim 4
Dependent Claim
31 words
The data transfer device of claim 1, wherein the second data storage device basic data width is 24 bits and the first data storage device basic data width is 16 bits.
Claim 5
Dependent Claim
39 words
The data transfer device of claim 3, wherein the mode of the second data storage device includes one significant byte per basic data width and wherein the first data storage device stores two significant bytes per basic data width.
Claim 6
Dependent Claim
39 words
The data transfer device of claim 3, wherein the mode of the second data storage device includes two significant bytes per basic data width and wherein the first data storage device stores two significant bytes per basic data width.
Claim 7
Dependent Claim
57 words
The data transfer device of claim 3, wherein the mode of the second data storage device includes three significant bytes per basic data width and wherein the first data storage device stores two significant bytes per basic data width, two bytes stored in a first data location and one byte stored in a second adjacent data location.
Claim 8
Dependent Claim
31 words
The data transfer device of claim 1, wherein the second data storage device basic data width is 24 bits and the first data storage device basic data width is 8 bits.
Claim 9
Dependent Claim
39 words
The data transfer device of claim 7, wherein the mode of the second data storage device includes one significant byte per basic data width and wherein the first data storage device stores one significant byte per basic data width.
Claim 10
Dependent Claim
40 words
The data transfer device of claim 7, wherein the mode of the second data storage device includes two significant bytes per basic data width and wherein the first data storage device stores the two significant bytes in adjacent data locations.
Claim 11
Dependent Claim
40 words
The data transfer device of claim 7, wherein the mode of the second data storage device includes three significant bytes per basic data width and wherein the first data storage device stores the three significant bytes in adjacent data locations.
Claim 12
Dependent Claim
262 words
A data transfer circuit in a computer system for bidirectionally transferring data between data storing devices having different basic data widths, the data transfer circuit comprising: a first data storage device; a second data storage device operating in a plurality of modes having different numbers of significant data bits contained in its basic data width; first data receiving circuitry for receiving data from the first data storage device at the basic data width of the first data storage device; first data providing circuitry for providing data to the first data storage device at the basic data width of the first data storage device; second data receiving circuitry for receiving data from the second data storage device at the basic data width of the second data storage device; second data providing circuitry for providing data to the second data storage device at the basic data width of the second data storage device; control register circuitry for receiving the mode indicating the amount of significant data in the second data storage device basic data width; multiplexor circuitry for converting data received from the first data storage device to the proper mode for the second data storage device and for inserting zero values in the remaining portions of the second data storage device basic data width for provision to the second data storage device; and multiplexor circuitry for converting data received from the second data storage device to the proper location for said first data storage device according to the mode for the second data storage device for provision to the first data storage device.
Claim 13
Dependent Claim
262 words
A data transfer circuit in a computer system for bidirectionally transferring data between data storing devices having different basic data widths, the data transfer circuit comprising: a first data storage device; a second data storage device operating in a plurality of modes having different numbers of significant data bits contained in its basic data width; first data receiving circuitry for receiving data from the first data storage device at the basic data width of the first data storage device; first data providing circuitry for providing data to the first data storage device at the basic data width of the first data storage device; second data receiving circuitry for receiving data from the second data storage device at the basic data width of the second data storage device; second data providing circuitry for providing data to the second data storage device at the basic data width of the second data storage device; control register circuitry for receiving the mode indicating the amount of significant data in the second data storage device basic data width; multiplexor circuitry for converting data received from the first data storage device to the proper mode for the second data storage device and for inserting zero values in the remaining portions of the second data storage device basic data width for provision to the second data storage device; and multiplexor circuitry for converting data received from the second data storage device to the proper location for said first data storage device according to the mode for the second data storage device for provision to the first data storage device.
Claim 14
Dependent Claim
21 words
The data transfer circuit of claim 11, wherein said first data storage device contains significant data stored in a packed manner.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-12-31 | 2000-07-01 | 2000-12-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-12-31 | 2004-07-01 | 2004-12-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-12-31 | 2008-07-01 | 2008-12-31 | $7700.00 | Window Closed / Lapsed |