Low voltage sensing circuits for battery powered devices having a micro-processor

Claim 2

A low voltage sensing circuit for a battery powered device having a logic circuit or subsystem, and a voltage regulator; wherein an input direct current voltage from a battery is fed to a voltage regulator having at least an input terminal, an output terminal, and a third terminal connected to ground, wherein the output direct current voltage of said voltage regulator is lower than said input voltage and is fed to the emitter of a PNP transistor and to an input power terminal of a logic circuit or subsystem; wherein the base of said PNP transistor is connected to a common point in a series resistor voltage divider comprising a first resistor and a second resistor, and the collector of said PNP transistor is connected to one end of a third reference resistor, the other end of which is connected to ground; wherein the end of said first resistor that is remote from said common point is connected to said input voltage, the end of said second resistor that is remote from said common point is connected to one side of a capacitor, and the other side of said capacitor is connected to an output port of said logic circuit or subsystem; wherein said collector of said PNP transistor is also connected to an input port of said logic circuit or subsystem; wherein the voltage at said output port of said logic circuit or subsystem is normally held at said output voltage value, and the voltage at said input port is zero volts with respect to ground; and means for periodically reducing the voltage at said output port for a predetermined interval of time to zero volts; wherein the values of each of said first and second resistors are chosen so that, if said input voltage falls below a predetermined value and when said output voltage of said output port of said logic circuit or subsystem is temporarily reduced to zero, said transistor becomes conductive and a voltage appears across said third resistor.

Claim 3

The low voltage sensing circuit of claim 1, wherein said logic circuit or subsystem is a micro-processor.

Claim 4

The low voltage sensing circuit of claim 2, wherein said micro-processor is a CMOS device.

Claim 5

The low voltage sensing circuit of claim 2, wherein said output port is one bit of a multi-bit port of said micro-processor, and said input port is another bit of said multi-bit port or one bit of another multi-bit port of said micro-processor.

Claim 6

The low voltage sensing circuit of claim 4, wherein, when said transistor is conductive, the voltage across said third resistor appears as a voltage pulse; and wherein the width of said voltage pulse increases as the value of said input voltage decreases.

Claim 7

The low voltage sensing circuit of claim 5, including means in said micro-processor for determining the width of said voltage pulse and thereby determining the amount that said input voltage has fallen below said predetermined value.

Claim 8

A low voltage sensing circuit for a battery powered device having a logic circuit or subsystem, and a voltage regulator; wherein an input direct current voltage from a battery is fed to a voltage regulator which is a switch mode DC--DC voltage converter having at least an input terminal, an output terminal, and a third terminal connected to ground, wherein the output direct current voltage of said voltage regulator is higher than said input voltage and is fed to the base of a PNP transistor and to an input power terminal of a logic circuit or subsystem; wherein the emitter of said PNP transistor is connected to a common point in a series resistor voltage divider comprising a first resistor and a second resistor, and the collector of said PNP transistor is connected to one end of a third reference resistor, the other end of which is connected to ground; wherein the end of said first resistor that is remote from said common point is connected to said input voltage, the end of said second resistor that is remote from said common point is connected to one side of a capacitor, and the other side of said capacitor is connected to an output port of said logic circuit or subsystem; wherein said collector of said PNP transistor is also connected to an input port of said logic circuit or subsystem; wherein the voltage at said output port of said logic circuit or subsystem is normally held at zero volts with respect to ground, and the voltage at said input port is also at zero volts with respect to ground; and means for periodically increasing the voltage at said output port for a predetermined interval of time to said output voltage; wherein the value of the forward bias base to emitter voltage is known and the values of each of said first and second resistors are chosen so that, so long as said input voltage is above the value of a predetermined voltage when said output voltage of said output port of said logic circuit or subsystem is temporarily increased to said output voltage, said transistor becomes conductive and a voltage appears across said third resistor.

Claim 9

A low voltage sensing circuit for a battery powered device having a logic circuit or subsystem, and a voltage regulator; wherein an input direct current voltage from a battery is fed to a voltage regulator which is a switch mode DC--DC voltage converter having at least an input terminal, an output terminal, and a third terminal connected to ground, wherein the output direct current voltage of said voltage regulator is higher than said input voltage and is fed to the base of a PNP transistor and to an input power terminal of a logic circuit or subsystem; wherein the emitter of said PNP transistor is connected to a common point in a series resistor voltage divider comprising a first resistor and a second resistor, and the collector of said PNP transistor is connected to one end of a third reference resistor, the other end of which is connected to ground; wherein the end of said first resistor that is remote from said common point is connected to said input voltage, the end of said second resistor that is remote from said common point is connected to one side of a capacitor, and the other side of said capacitor is connected to an output port of said logic circuit or subsystem; wherein said collector of said PNP transistor is also connected to an input port of said logic circuit or subsystem; wherein the voltage at said output port of said logic circuit or subsystem is normally held at zero volts with respect to ground, and the voltage at said input port is also at zero volts with respect to ground; and means for periodically increasing the voltage at said output port for a predetermined interval of time to said output voltage; wherein the value of the forward bias base to emitter voltage is known and the values of each of said first and second resistors are chosen so that, so long as said input voltage is above the value of a predetermined voltage when said output voltage of said output port of said logic circuit or subsystem is temporarily increased to said output voltage, said transistor becomes conductive and a voltage appears across said third resistor.

Claim 10

The low-voltage sensing circuit of claim 7, wherein said logic circuit or subsystem is a micro-processor.

Claim 11

The low voltage sensing circuit of claim 8, wherein said micro-processor is a CMOS device.

Claim 12

The low voltage sensing circuit of claim 8, wherein said output port is one bit of a multi-bit port of said micro-processor, and said input port is another bit of said multi-bit port or one bit of another multi-bit port of said micro-processor.

Claim 13

The low voltage sensing circuit of claim 10, wherein, when said transistor is conductive, the voltage across said third resistor appears as a voltage pulse; and wherein the width of said voltage pulse decreases as the value of said input voltage decreases.

Claim 14

The low voltage sensing circuit of claim 11, including means in said micro-processor for determining the width of said voltage pulse and thereby determining the amount that said input voltage is above said predetermined value.

Claim 15

A low voltage sensing circuit for a battery-powered device having a circuit or subsystem, and a DC voltage conversion device; wherein an input direct current voltage is fed to an input terminal of said DC voltage conversion device and an output direct current voltage is fed from an output terminal of said DC voltage conversion device to an input power terminal of a logic circuit or subsystem and to one of the base or emitter of a PNP transistor, and said DC voltage conversion device has a third terminal connected to the system ground; wherein the other of said base or emitter of said PNP transistor is connected to a common point in a series resistor voltage divider comprising a first resistor and a second resistor, and the collector of said PNP transistor is connected to one end of a third reference resistor, the other end of which is connected to the system ground; wherein the end of said first resistor that is remote from said common point is connected to said input voltage, the end of said second resistor that is remote from said common point is connected to one side of a capacitor, and the other side of said capacitor is connected to an output port of said logic circuit or subsystem; wherein said collector of said PNP transistor is also connected to an input port of said logic circuit or subsystem; wherein the voltage at said output port of said logic circuit or subsystem is periodically changed so as to issue a voltage pulse which may temporarily cause said transistor to become conductive so that a voltage appears across said third resistor; and wherein the values of each of said first and second resistors are chosen so that conduction of said PNP transistor occurs during said voltage pulse when said input voltage has a predetermined relationship to a predetermined voltage.

Claim 16

A low voltage sensing circuit for a battery-powered device having a circuit or subsystem, and a DC voltage conversion device; wherein an input direct current voltage is fed to an input terminal of said DC voltage conversion device and an output direct current voltage is fed from an output terminal of said DC voltage conversion device to an input power terminal of a logic circuit or subsystem and to one of the base or emitter of a PNP transistor, and said DC voltage conversion device has a third terminal connected to the system ground; wherein the other of said base or emitter of said PNP transistor is connected to a common point in a series resistor voltage divider comprising a first resistor and a second resistor, and the collector of said PNP transistor is connected to one end of a third reference resistor, the other end of which is connected to the system ground; wherein the end of said first resistor that is remote from said common point is connected to said input voltage, the end of said second resistor that is remote from said common point is connected to one side of a capacitor, and the other side of said capacitor is connected to an output port of said logic circuit or subsystem; wherein said collector of said PNP transistor is also connected to an input port of said logic circuit or subsystem; wherein the voltage at said output port of said logic circuit or subsystem is periodically changed so as to issue a voltage pulse which may temporarily cause said transistor to become conductive so that a voltage appears across said third resistor; and wherein the values of each of said first and second resistors are chosen so that conduction of said PNP transistor occurs during said voltage pulse when said input voltage has a predetermined relationship to a predetermined voltage.

Claim 17

The low-voltage sensing circuit of claim 13, wherein said logic circuit or subsystem is a micro-processor.

Claim 20

The method of claim 15, wherein said logic circuit or subsystem is a micro-processor.

Claim 21

The method of claim 16, wherein conduction of said normally non-conductive semiconductor device causes a transient pulse to be impressed upon an input port of said micro-processor.

Claim 22

The method of claim 17, wherein the width of said transient pulse is measured by width determination means to determine the amount by which the magnitude of said varying input battery voltage differs from said predetermined amount.