← Back to Patent Explorer
US5587090A Expired / Lapsed US ⏱️ 0.0 years remaining

Multiple level mask for patterning of ceramic materials

Assignee: Texas Instruments Inc
•
Filing: 1994-04-04
•
Granted: 1996-12-24
•
Expires: 2014-04-04
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A novel multiple level mask (e.g. tri-level mask 36) process for masking achieves a desired thick mask with substantially vertical walls and thus improves the ion milling process of ceramic materials (e.g. BST). An embodiment of the present invention is a microelectronic structure comprising a ceramic substrate, an ion mill mask layer (e.g. photoresist 42) overlaying the substrate, a dry-etch-selective mask layer (e.g. TiW 40) overlaying the ion mill mask layer, the dry-etch-selective mask layer comprising a different material than the ion mill mask layer, a top photosensitive layer (38) overlaying the dry-etch-selective mask layer, the top photosensitive layer comprising a different material than the dry-etch-selective mask layer, and a predetermined pattern formed in the top photosensitive layer, the dry-etch-selective mask layer and the ion mill mask layer. The predetermined pattern has substantially vertical walls in the ion mill mask layer.

Inventors

  • 👤 James F. Belcher
  • 👤 Steven N. Frank
  • 👤 John P. Long
  • 👤 Jeanee Jones

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 16:48
CPC Classifications
C; C04; C04B; C04B41/00; C04B41/009; C04B41/53; C04B41/5338; C04B41/80; C04B41/91; H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/18; H10F39/184; H10F39/1843; H10N; H10N15/00; H10N15/10; C04B2111/00; C04B2111/00474; C04B2111/00844; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/948; Y10S438/951

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 174 words
A method of forming a microelectronic structure, said method comprising steps: (a) providing a ceramic substrate; (b) chemical vapor depositing a parylene mask layer on said ceramic substrate; (c) forming a dry-etch-selective mask layer on said parylene mask layer, said dry-etch-selective mask layer comprising a different material than said parylene mask layer; (d) forming a top photosensitive layer on said dry-etch-selective mask layer, said top photosensitive layer comprising a different material than said dry-etch-selective mask layer; (e) forming a pattern in said top photosensitive layer using photolithography; (f) forming said pattern in said dry-etch-selective mask layer using said top photosensitive layer as a first etch mask: (g) forming said pattern in said parylene mask layer using said dry-etch-selective mask layer as a second etch mask, said parylene mask layer having vertical walls; and (h) ion milling said pattern in said ceramic substrate using said parylene mask layer as a third etch mask, whereby the vertical walls of the parylene mask layer allow vertical walls and/or deep trenches to be formed in the ceramic substrate.
Claim 2
Independent Claim 174 words
A method of forming a microelectronic structure, said method comprising steps: (a) providing a ceramic substrate; (b) chemical vapor depositing a parylene mask layer on said ceramic substrate; (c) forming a dry-etch-selective mask layer on said parylene mask layer, said dry-etch-selective mask layer comprising a different material than said parylene mask layer; (d) forming a top photosensitive layer on said dry-etch-selective mask layer, said top photosensitive layer comprising a different material than said dry-etch-selective mask layer; (e) forming a pattern in said top photosensitive layer using photolithography; (f) forming said pattern in said dry-etch-selective mask layer using said top photosensitive layer as a first etch mask: (g) forming said pattern in said parylene mask layer using said dry-etch-selective mask layer as a second etch mask, said parylene mask layer having vertical walls; and (h) ion milling said pattern in said ceramic substrate using said parylene mask layer as a third etch mask, whereby the vertical walls of the parylene mask layer allow vertical walls and/or deep trenches to be formed in the ceramic substrate.
Claim 3
Dependent Claim 21 words
The method according to claim 1, wherein said ceramic substrate is selected from the group consisting of: oxides, nitrides and carbides.
Claim 4
Dependent Claim 14 words
The method according to claim 1, wherein said ceramic substrate is barium strontium titanate.
Claim 5
Dependent Claim 29 words
The method according to claim 1, said method further comprising forming a lift-off layer on said ceramic substrate before said step of chemical vapor depositing said parylene mask layer.
Claim 6
Dependent Claim 25 words
The method according to claim 4, said method further comprising dissolving said lift-off layer after said step of etching said pattern in said ceramic substrate.
Claim 7
Dependent Claim 13 words
The method according to claim 4, wherein said lift-off layer is soluble polyimide.
Claim 8
Dependent Claim 23 words
The method according to claim 4, wherein said lift-off layer is selected from the group consisting of: polyimide thinner, epoxy, photoresist and wax.
Claim 9
Dependent Claim 17 words
The method according to claim 1, wherein said dry-etch-selective mask layer is a metal or metal compound.
Claim 10
Dependent Claim 13 words
The method according to claim 1, wherein said dry-etch-selective mask layer is TiW.
Claim 11
Dependent Claim 31 words
The method according to claim 1, wherein said dry-etch-selective mask layer is selected from the group consisting of: SiO 2 , spin on glass, Si 3 N 4 , and cermets.
Claim 12
Dependent Claim 12 words
The method according to claim 1, wherein said pattern is a grid.
Claim 13
Dependent Claim 39 words
The method according to claim 1, said method further comprising removing said top photosensitive layer, said dry-etch-selective mask layer and said parylene mask layer from said ceramic substrate, after said step of etching said pattern in said ceramic substrate.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-12-24 2000-06-24 2000-12-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-12-24 2004-06-24 2004-12-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-12-24 2008-06-24 2008-12-24 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag