Patent US5586046A successfully refreshed from Google Patents.
US5586046A
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Computer implemented method for generating an integrated circuit design
Assignee: NXP USA Inc
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Filing: 1994-10-28
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Granted: 1996-12-17
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Expires: 2014-10-28
Abstract
Abstract A computer implemented method for generating an integrated circuit design (11) is provided. A description of a circuit (16) is provided in a format such as a Hardware Description Language (12). A functional simulation (17) of the description is run to determine functionality of the circuit. A netlist conversion (18) converts the description to a netlist comprising both a single-ended and differential circuit. The netlist conversion (18) converts the description to a single-ended description (24), replaces single-ended cells with differential cells and interconnects the differential cells (25), and exchanges terminals of the differential cells to maintain logic equivalence (26). A simulation with timing (19) is run on the netlist to verify timing characteristics of the circuit. The netlist is then provided to a router to generate a physical circuit layout (20) having both single-ended and differential circuits.
Inventors
- 👤 David Feldbaumer
- 👤 Frederick L. Lum
- 👤 Vickie Mercier
- 👤 Mark B. Weaver
- 👤 Jan-Chung Wong
- 👤 Rimon Shookhtim
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 12:42
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/32; G06F30/327
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
117 words
A computer implemented method for generating an integrated circuit design from a description, the description comprising a plurality of single-ended cells coupled together to form a circuit, the method comprising the steps of: identifying single-ended cells of the circuit to be changed to full differential cells; replacing some of the identified single-ended cells with corresponding equivalent differential cells; converting remaining single-ended cells of the identified single-ended cells with logically equivalent differential cells generated via DeMorgans theorem; and coupling differential terminals of said equivalent differential cells and said logically equivalent differential to form a differential circuit, said differential circuit being functionally equivalent to the identified single-ended cells of the circuit, the remaining single-ended cells form a single-ended circuit.
Claim 2
Dependent Claim
117 words
A computer implemented method for generating an integrated circuit design from a description, the description comprising a plurality of single-ended cells coupled together to form a circuit, the method comprising the steps of: identifying single-ended cells of the circuit to be changed to full differential cells; replacing some of the identified single-ended cells with corresponding equivalent differential cells; converting remaining single-ended cells of the identified single-ended cells with logically equivalent differential cells generated via DeMorgans theorem; and coupling differential terminals of said equivalent differential cells and said logically equivalent differential to form a differential circuit, said differential circuit being functionally equivalent to the identified single-ended cells of the circuit, the remaining single-ended cells form a single-ended circuit.
Claim 3
Dependent Claim
39 words
The method as recited in claim 1 wherein prior to the step of identifying single-ended cells of the circuit to be changed to full differential cells there is a step of simulating the circuit for checking the circuit functionality.
Claim 4
Dependent Claim
61 words
The method as recited in claim 1 wherein said step of converting converting remaining single-ended cells of the identified single-ended cell includes the steps of: replacing remaining single-ended cells of the identified single-ended cells with differential cells; and exchanging connections of differential terminals of said differential cells to maintain logic equivalence to said remaining single-ended cells of the identified single-ended cells.
Claim 5
Dependent Claim
25 words
The method as recited in claim 1 further including a step of simulating said single-ended circuit and said differential circuit for checking timing and functionality.
Claim 6
Dependent Claim
19 words
The method as recited in claim 4 further including a step of generating a physical layout of the circuit.
Claim 7
Dependent Claim
25 words
The method as recited in claim 5 further including a step of simulating the circuit with back-annotated parasitic capacitance and resistance from said physical layout.
Claim 8
Dependent Claim
28 words
The method as recited in claim 6 further including a step of simulating propagation delays within the circuit with back-annotated parasitic capacitance and resistance from said physical layout.
Claim 9
Dependent Claim
28 words
The method as recited in claim 7 further including a step of verifying said physical layout conforms to layout design rules and said physical layout matches the circuit.
Claim 10
Independent Claim
71 words
A method for computer generating an integrated circuit design comprising the steps of: providing a single-ended cells library; generating equivalent differential cells of some single-ended cells of said single-ended cells library; generating logically equivalent differential cells using DeMorgans theorem for remaining single-ended cells of said single-ended cells library; and combining equivalent differential cells and logically equivalent differential cells to form a differential cells library functionally equivalent to said single-ended cells library.
Claim 11
Independent Claim
71 words
A method for computer generating an integrated circuit design comprising the steps of: providing a single-ended cells library; generating equivalent differential cells of some single-ended cells of said single-ended cells library; generating logically equivalent differential cells using DeMorgans theorem for remaining single-ended cells of said single-ended cells library; and combining equivalent differential cells and logically equivalent differential cells to form a differential cells library functionally equivalent to said single-ended cells library.
Claim 12
Dependent Claim
104 words
The method as recited in claim 9 further including the steps of: providing a description of a circuit; converting said description of said circuit to a netlist of interconnected single-ended cells from said single-ended cells library; identifying single-ended cells of said circuit to be changed to full differential cells; replacing the identified single-ended cells of said circuit with equivalent differential cells and logically equivalent differential cells; and coupling differential terminals of the replaced single-ended cells with equivalent differential cells and logically equivalent differential cells to form a differential circuit wherein said differential circuit is functionally equivalent to the identified single-ended cells of the circuit.
Claim 13
Dependent Claim
33 words
The method as recited in claim 10 wherein said step of providing a description of a circuit includes a step of providing a description of a circuit in truth table or equation format.
Claim 14
Dependent Claim
31 words
The method as recited in claim 10 wherein said step of providing a description of a circuit includes a step of providing a description of a circuit in a state diagram.
Claim 15
Dependent Claim
48 words
The method as recited in claim 10 wherein said step of converting said description of said circuit to a netlist of interconnected single-ended cells further includes a step of converting said description of said circuit with a circuit synthesis tool for generating said netlist of interconnected single-ended cells.
Claim 16
Dependent Claim
32 words
The method as recited in claim 10 wherein said step of providing a description of a circuit includes a step of providing a description of a circuit in a hardware description language.
Claim 17
Independent Claim
67 words
A method for computer generating an integrated circuit comprising the steps of: providing a single-ended cells library; providing a netlist, said netlist comprising a plurality of single-ended cells from said single-ended cell library interconnected to form a circuit; identifying interconnections between said plurality of single-ended cells; converting select ones of said plurality of single-ended cells to differential cells; and changing interconnections of said differential cells to busses.
Claim 18
Independent Claim
67 words
A method for computer generating an integrated circuit comprising the steps of: providing a single-ended cells library; providing a netlist, said netlist comprising a plurality of single-ended cells from said single-ended cell library interconnected to form a circuit; identifying interconnections between said plurality of single-ended cells; converting select ones of said plurality of single-ended cells to differential cells; and changing interconnections of said differential cells to busses.
Claim 19
Dependent Claim
99 words
The method as recited in claim 15 wherein said step of converting select ones of said plurality of single-ended cells to differential cells includes the steps of: generating equivalent differential cells of some single-ended cells of said single-ended cells library; generating logically equivalent differential cells using DeMorgans theorem for remaining single-ended cells of said single-ended cells library: and combining equivalent differential cells and logically equivalent differential cells to form a differential cells library functionally equivalent to said single-ended cells library; and exchanging said select ones of said plurality of single-ended cells to differential cells from said differential cells library.
Claim 20
Dependent Claim
45 words
The method as recited in claim 16 wherein said step of changing interconnections of said differential cells to busses includes a step exchanging bus interconnections of said differential base cells for providing a logic equivalent of said select ones of said plurality of single-ended cells.
Claim 21
Dependent Claim
34 words
The method as recited in claim 17 wherein said step of changing interconnections of said differential cells to busses includes a step of changing interconnection of said differential cells to busses having two lines.
References Cited (Backward Citations)
US5396435A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-12-17 | 2000-06-17 | 2000-12-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-12-17 | 2004-06-17 | 2004-12-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-12-17 | 2008-06-17 | 2008-12-17 | $7700.00 | Window Closed / Lapsed |