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US5585659A
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US
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Complementary metal-insulator-semiconductor devices
Assignee: NTT Inc
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Filing: 1994-10-11
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Granted: 1996-12-17
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Expires: 2014-10-11
Abstract
Abstract A method for fabricating semiconductor devices wherein polysilicon gates for complementary-type field-effect semiconductor devices are formed of polysilicon to which impurity doped simultaneously to the polysilicon deposition; the both gates having the dual N + /P + polysilicon gate structure, so that the both N- and P-channel transistors are formed as the surface-channel type ones; and therefore, the off-characteristic, the short channel effect, and the controllability of threshold voltage are progressed. More specifically, N- and P-channel MISFETs are provided on a common semiconductor substrate (1); N-type polysilicon (9) doped with N-type impurity is adopted as the gate electrode for the N-channel MISFET; P-type polysilicon (8) doped with P-type impurity is adopted as the gate electrode for the P-channel MISFET; and a narrow region preventing the mutual diffusion of impurities is provided between portions of respective polysilicon.
Inventors
- 👤 Toshio Kobayashi
- 👤 Yukio Okazaki
- 👤 Masayasu Miyake
- 👤 Hiroshi Inokawa
- 👤 Takashi Morimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:15
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0172; H10D84/0177; H10D84/02; H10D84/03; H10D84/038
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
283 words
A complementary metal-insulator-semiconductor device comprising: a first transistor region having a first conductivity type and formed in a surface of a semiconductor substrate; a second transistor region having a second conductivity type which is opposite the first conductivity type, the second transistor region formed in the surface of the semiconductor substrate and isolated from the first transistor region; a first field effect transistor including: a) a first gate oxide film formed on the first transistor region; b) a source region and a drain region which are formed in the first transistor region; and c) a first gate polysilicon film having a top surface, said first gate polysilicon film being formed on the first gate oxide film and doped with an impurity having a conductivity type which is opposite the first conductivity type; a second field effect transistor including: a) a second gate oxide film formed on the second transistor region; b) a source region and a drain region which are formed in the second transistor region; and c) a second gate polysilicon film having a top surface, said second gate polysilicon film being formed on the second gate oxide film and doped with an impurity having a conductivity type which is opposite the second conductivity type; and an oxide film formed by an oxidation process, said oxide film is located between said first and second gate polysilicon films and has a top surface; and a silicide film or a refractory metal film being provided on and directly contacting a portion of said top surface of the first and second gate polysilicon films not covered by said oxide film, and being provided simultaneously on an exposed portion the top surface of said oxide film.
Claim 2
Dependent Claim
283 words
A complementary metal-insulator-semiconductor device comprising: a first transistor region having a first conductivity type and formed in a surface of a semiconductor substrate; a second transistor region having a second conductivity type which is opposite the first conductivity type, the second transistor region formed in the surface of the semiconductor substrate and isolated from the first transistor region; a first field effect transistor including: a) a first gate oxide film formed on the first transistor region; b) a source region and a drain region which are formed in the first transistor region; and c) a first gate polysilicon film having a top surface, said first gate polysilicon film being formed on the first gate oxide film and doped with an impurity having a conductivity type which is opposite the first conductivity type; a second field effect transistor including: a) a second gate oxide film formed on the second transistor region; b) a source region and a drain region which are formed in the second transistor region; and c) a second gate polysilicon film having a top surface, said second gate polysilicon film being formed on the second gate oxide film and doped with an impurity having a conductivity type which is opposite the second conductivity type; and an oxide film formed by an oxidation process, said oxide film is located between said first and second gate polysilicon films and has a top surface; and a silicide film or a refractory metal film being provided on and directly contacting a portion of said top surface of the first and second gate polysilicon films not covered by said oxide film, and being provided simultaneously on an exposed portion the top surface of said oxide film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-12-17 | 2000-06-17 | 2000-12-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-12-17 | 2004-06-17 | 2004-12-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-12-17 | 2008-06-17 | 2008-12-17 | $7700.00 | Window Closed / Lapsed |